公开(公告)号：US20200184869A1

公开(公告)日：2020-06-11

申请号：US16429051

申请日：2019-06-02

Applicant: Novatek Microelectronics Corp.

Inventor： Po-Hsiang Fang ,  Jhih-Siou Cheng ,  Ju-Lin Huang

IPC: G09G3/20

Abstract: A source driver and an operating method thereof are provided. The source driver includes a high voltage circuit, a low voltage circuit and a sensing circuit. The low voltage circuit is coupled to the high voltage circuit. The high voltage circuit and low voltage circuit drive a display panel. The sensing circuit is coupled to the low voltage circuit. The sensing circuit senses the display panel during an analog-to-digital operating period. At least one of the high voltage circuit and the low voltage circuit is disabled during at least part of the analog-to-digital operating period.

公开(公告)号：US10297558B1

公开(公告)日：2019-05-21

申请号：US15839813

申请日：2017-12-12

Applicant: Novatek Microelectronics Corp.

Inventor： Tzong-Honge Shieh ,  Po-Hsiang Fang

IPC: G06F3/06 ,  G06F12/00 ,  G11C16/08 ,  G01P21/00 ,  G11C5/00 ,  H03L7/00 ,  G11C16/06 ,  H01L35/00 ,  H01L23/58 ,  H01L21/66 ,  H01L23/525 ,  G11C17/16

Abstract: The disclosure provides a trimming method, a trimming circuitry, and a trimming system for an IC with memory usage reduction. The method is applicable to a system including a tester, a characteristic adjustable circuit, and a trimming circuitry having a characteristic outputting circuit, a data memory, and a trim memory. The method includes the following steps. Under each condition, output signals respectively corresponding to trim settings are received from the characteristic adjustable circuit by the characteristic outputting circuit to obtain output values of the condition, a statistical parameter associated with the output values of the condition is calculated by the tester. The statistical parameter of at least one of the conditions is written into the data memory by the tester. An optimal trim setting of the characteristic adjustable circuit is determined according to the statistical parameters under all the conditions and written into the trim memory by the tester.

公开(公告)号：US20190130813A1

公开(公告)日：2019-05-02

申请号：US15976830

申请日：2018-05-10

Applicant: Novatek Microelectronics Corp.

Inventor： Po-Hsiang Fang ,  Jhih-Siou Cheng

IPC: G09G3/20

Abstract: An electronic device for driving a display panel and an operation method thereof are provided. The electronic device includes a sensing circuit, a dummy sensing circuit, a multiplexer circuit and a processing circuit. The sensing circuit senses a sensing line of the display panel to output a sensing result. The dummy sensing circuit senses a dummy signal to output a dummy sensing result, wherein the dummy signal is related to a part of or all of signals of the sensing line. The multiplexer circuit time-divisionally outputs the dummy sensing result and the sensing result. The processing circuit is coupled to an output terminal of the multiplexer circuit to time-divisionally receive the dummy sensing result and the sensing result.

公开(公告)号：US20170229085A1

公开(公告)日：2017-08-10

申请号：US15016295

申请日：2016-02-05

Applicant: Novatek Microelectronics Corp.

Inventor： Po-Hsiang Fang ,  Jhih-Siou Cheng

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G09G2300/0408 ,  G09G2310/0251 ,  G09G2310/0286 ,  G09G2310/08

Abstract: A gate driver and an operation method thereof are provided. The gate driver includes clock transmission wires and driving circuits. The clock transmission wires are configured to transmit clock signals having different phases. Each of the driving circuits has a clock input terminal, a pre-charge terminal, a discharge control terminal and an output terminal. The output terminals are configured to drive gate lines of a display panel. The driving circuits are grouped into several driving circuit groups. The driving circuits belonging to a first driving circuit group among the driving circuit groups are called first driving circuits. The clock input terminals of the first driving circuits are coupled to different transmission wires among the clock transmission wires. The pre-charge terminals of the first driving circuits commonly receive a first pre-charge signal. The discharge control terminals of the first driving circuits commonly receive a first discharge control signal.

公开(公告)号：US20160284297A1

公开(公告)日：2016-09-29

申请号：US14669003

申请日：2015-03-26

Applicant: Novatek Microelectronics Corp.

Inventor： Jhih-Siou Cheng ,  Po-Hsiang Fang ,  Chieh-An Lin ,  Po-Yu Tseng ,  Ju-Lin Huang ,  Yi-Chuan Liu

IPC: G09G3/36

CPC classification number: G09G3/3648 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0413 ,  G09G2310/08 ,  G09G2320/0223

Abstract: A source driver apparatus and an operating method thereof are provided. The source driver apparatus can drive a plurality of source lines of a display panel, wherein the display panel further comprising a gate driver apparatus. The source driver apparatus includes driving channels and a delay control circuit. The driving channels output source driving signals. The delay control circuit controls the driving channels to change delay times of the source driving signals within the same period, such that the delay times of the source driving signals respectively correspond to distances from the source lines to the gate driver apparatus.

Abstract translation: 提供源驱动器装置及其操作方法。 源极驱动器装置可以驱动显示面板的多个源极线，其中显示面板还包括栅极驱动器装置。 源极驱动器装置包括驱动通道和延迟控制电路。 驱动通道输出源驱动信号。 延迟控制电路控制驱动信道以改变在相同周期内的源极驱动信号的延迟时间，使得源极驱动信号的延迟时间分别对应于从源极线到栅极驱动器装置的距离。

公开(公告)号：US20150084947A1

公开(公告)日：2015-03-26

申请号：US14561200

申请日：2014-12-04

Applicant: Novatek Microelectronics Corp.

Inventor： Jr-Ching Lin ,  Hsin-Hung Lee ,  Chia-Wei Su ,  Po-Yu Tseng ,  Shun-Hsun Yang ,  Po-Hsiang Fang

IPC: G09G3/36

CPC classification number: G09G3/3696 ,  G09G1/005 ,  G09G3/3688 ,  G09G2320/0673

Abstract: A source driver includes a first drive channel circuit, a voltage controller and a first programmable voltage buffer unit. The first drive channel circuit receives a first pixel data and a first reference voltage group, for driving the display device. The voltage controller receives a voltage command during a line data transmitting period, a horizontal blanking period or a vertical blanking period for generating a first reference voltage configuration data. The first programmable voltage buffer unit is coupled to the voltage controller and the first drive channel circuit, and receives the first reference voltage configuration data for applying the first reference voltage group to the first drive channel circuit. Furthermore, a method for driving a display device is also provided.

Abstract translation: 源驱动器包括第一驱动通道电路，电压控制器和第一可编程电压缓冲器单元。 第一驱动通道电路接收第一像素数据和第一参考电压组，用于驱动显示装置。 电压控制器在行数据发送期间，水平消隐期间或垂直消隐期间接收电压指令，以产生第一参考电压配置数据。 第一可编程电压缓冲器单元耦合到电压控制器和第一驱动通道电路，并且接收用于将第一参考电压组施加到第一驱动通道电路的第一参考电压配置数据。 此外，还提供了一种用于驱动显示装置的方法。

公开(公告)号：US20140049524A1

公开(公告)日：2014-02-20

申请号：US13778122

申请日：2013-02-27

Applicant: NOVATEK MICROELECTRONICS CORP.

Inventor： Shun-Hsun Yang ,  Chia-Wei Su ,  Po-Yu Tseng ,  Po-Hsiang Fang ,  Hsin-Hung Lee

IPC: G09G3/00

CPC classification number: G09G3/006 ,  G09G3/3688 ,  G09G2330/12 ,  G09G2370/08

Abstract: A method for displaying error rates of data channels of a display is provided. A timing controller of the display repeatedly transmits a test signal with a specific format to a first and a second source drivers of the display via a first and a second data channels of the display. During testing, a first number and a second number of times of the first source driver and the second source driver determining that the received test signal does not have the specific format are counted respectively. The first and the second source drivers control displaying of a first area and a second area of a panel of the display respectively according to the counted first and second numbers of times. Accordingly, the error rates of the data channels are presented on the panel of the display in a way that the error rates could be recognized more easily.

Abstract translation: 提供了一种用于显示显示器的数据通道的错误率的方法。 显示器的定时控制器经由显示器的第一和第二数据通道重复地将特定格式的测试信号发送到显示器的第一和第二源驱动器。 在测试期间，分别计数第一源驱动器和第二源驱动器的第一次数和第二次数，以确定所接收的测试信号不具有特定格式。 第一和第二源驱动器分别根据计数的第一和第二次数来分别显示显示器的面板的第一区域和第二区域。 因此，数据通道的错误率以更容易识别错误率的方式呈现在显示器的面板上。

公开(公告)号：US20140009450A1

公开(公告)日：2014-01-09

申请号：US13935546

申请日：2013-07-04

Applicant: NOVATEK Microelectronics Corp.

Inventor： Chia-Wei Su ,  Shun-Hsun Yang ,  Hsin-Hung Lee ,  Po-Hsiang Fang ,  Po-Yu Tseng ,  Li-Tang Lin

IPC: G09G5/00

CPC classification number: G09G5/001 ,  G09G3/20 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2310/0281 ,  G09G2310/0297

Abstract: A flat panel display with multi-drop interfaces is disclosed. The flat panel display with multi-drop interfaces includes a plurality of driver chips having a plurality of respective hardware setting values via a hardware setting, and a timing controller for transmitting at least one signal to the plurality of driver chips via at least one multi-drop interface, wherein the timing controller and a specific driver chip among the plurality of driver chips negotiate with each other according to a corresponding specific respective hardware setting value among the plurality of respective hardware setting values.

Abstract translation: 公开了具有多点接口的平板显示器。 具有多点接口的平板显示器包括经由硬件设置具有多个相应的硬件设置值的多个驱动器芯片，以及定时控制器，用于经由至少一个多点接口将至少一个信号发送到多个驱动器芯片， 其中所述定时控制器和所述多个驱动器芯片中的特定驱动器芯片根据所述多个相应硬件设置值中的对应的特定相应的硬件设置值来彼此协商。