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公开(公告)号:US20210098319A1
公开(公告)日:2021-04-01
申请号:US17017407
申请日:2020-09-10
Applicant: QUALCOMM Incorporated
Inventor: Je-Hsiung LAN , Ranadeep DUTTA , Jonghae KIM
IPC: H01L23/15 , H01L21/768 , H01L21/321 , H01L21/48 , H01L23/522 , H01L23/373 , H01L27/06 , C04B35/111 , C04B37/02 , H03H9/10 , H03H3/10
Abstract: Disclosed are devices and methods for semiconductor devices including a ceramic substrate. Aspects disclosed include semiconductor device including an electrical component, an alumina ceramic substrate and a substrate-film. The substrate-film is deposited on the alumina ceramic substrate. The substrate-film has a planar substrate-film surface opposite the alumina ceramic substrate. The electrical component is formed on the substrate-film surface of the substrate-film on the alumina ceramic substrate.
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公开(公告)号:US20200266512A1
公开(公告)日:2020-08-20
申请号:US16279902
申请日:2019-02-19
Applicant: QUALCOMM Incorporated
Inventor: Kai LIU , Rui TANG , Changhan Hobie YUN , Mario Francisco VELEZ , Jonghae KIM
IPC: H01P1/203
Abstract: Aspects of the disclosure are directed to a bandpass filter including a first, second, third and fourth resonators, wherein the second and third resonators are in parallel, wherein the first resonator includes a first and second terminals, wherein the second resonator includes a second resonator top terminal and a second resonator bottom terminal, wherein the third resonator includes a third resonator top terminal and a third resonator bottom terminal, wherein the fourth resonator includes a third terminal and a fourth terminal; wherein the first terminal is coupled to the second resonator top terminal, wherein the second terminal is coupled to the third resonator top terminal, wherein the third terminal is coupled to the third resonator bottom terminal, wherein the fourth terminal is coupled to the second resonator bottom terminal; a first inductor coupled to the first and third terminals; and a second inductor coupled to the second and fourth terminals.
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公开(公告)号:US20200091094A1
公开(公告)日:2020-03-19
申请号:US16132323
申请日:2018-09-14
Applicant: QUALCOMM Incorporated
Inventor: Changhan Hobie YUN , Mario Francisco VELEZ , Nosun PARK , Niranjan Sunil MUDAKATTE , Wei-Chuan CHEN , Paragkumar Ajaybhai THADESAR , Christopher POLLOCK , Xiaoju YU , Rongguo ZHOU , Kai LIU , Jonghae KIM
Abstract: A filter including an insulating die having a plurality of MIM (Metal Insulator Metal) capacitors disposed within the die is disclosed. A 2.5D (2.5 Dimensional) inductor disposed within a redistribution layer (RDL) is electrically coupled to at least one of the plurality of MIM capacitors in the die. A 3D (3 Dimensional) inductor is disposed around the die and is electrically coupled to at least one of the plurality of MIM capacitors.
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公开(公告)号:US20190132942A1
公开(公告)日:2019-05-02
申请号:US15798071
申请日:2017-10-30
Applicant: QUALCOMM Incorporated
Inventor: Changhan Hobie YUN , Jonghae KIM , Xiaoju YU , Mario Francisco VELEZ , Wei-Chuan CHEN , Niranjan Sunil MUDAKATTE , Matthew Michael NOWAK , Christian HOFFMANN , Rodrigo PACHER FERNANDES , Manuel HOFER , Peter BAINSCHAB , Edgar SCHMIDHAMMER , Stefan Leopold HATZL
CPC classification number: H05K1/0233 , H03H3/02 , H03H3/08 , H03H9/02086 , H03H9/0547 , H03H9/1014 , H03H9/1071 , H05K3/32
Abstract: A passive on glass (POG) on filter capping apparatus may include an acoustic filter die. The apparatus may further include a capping die electrically coupled to the acoustic filter die. The capping die may include a 3D inductor.
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65.
公开(公告)号:US20190081607A1
公开(公告)日:2019-03-14
申请号:US15705035
申请日:2017-09-14
Applicant: QUALCOMM Incorporated
Inventor: Mario Francisco VELEZ , Niranjan Sunil MUDAKATTE , Jonghae KIM , Changhan Hobie YUN , David Francis BERDY , Shiqun GU , Chengjie ZUO
IPC: H03H7/01 , H01L49/02 , H01L23/532 , H03H3/00 , H01L27/01 , H01L23/522 , H01L23/528
Abstract: An integrated device that includes a substrate, a first interconnect over the substrate and a second interconnect comprising a first portion and a second portion. The integrated device further comprising a first dielectric layer between the first interconnect and the first portion of the second interconnect such that the first interconnect vertically overlaps with the first dielectric layer and the first portion of the second interconnect. The integrated device also includes a second dielectric layer formed over the substrate. The first interconnect, the first dielectric layer and the first portion of the second interconnect are configured to operate as a capacitor. The first portion and the second portion of the second interconnect are configured to operate as an inductor.
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公开(公告)号:US20180167054A1
公开(公告)日:2018-06-14
申请号:US15379392
申请日:2016-12-14
Applicant: QUALCOMM Incorporated
Inventor: David Francis BERDY , Changhan Hobie YUN , Shiqun GU , Niranjan Sunil MUDAKATTE , Mario Francisco VELEZ , Chengjie ZUO , Jonghae KIM
CPC classification number: H03H9/64 , H03H3/08 , H03H9/0523 , H03H9/0547 , H03H9/0561 , H03H9/059 , H03H9/72
Abstract: An integrated radio frequency (RF) circuit combines complementary features of passive devices and acoustic filters and includes a first die, a second die, and a third die. The first die includes a substrate having one or more passive devices. The second die includes a first acoustic filter. The second die is stacked and coupled to a first surface of the first die. The third die includes a second acoustic filter. The third die is stacked and coupled to a second surface opposite the first surface of the first die.
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公开(公告)号:US20180090475A1
公开(公告)日:2018-03-29
申请号:US15275068
申请日:2016-09-23
Applicant: QUALCOMM Incorporated
Inventor: Chengjie ZUO , Jonghae KIM , David Francis BERDY , Changhan Hobie YUN , Niranjan Sunil MUDAKATTE , Mario Francisco VELEZ , Shiqun GU
IPC: H01L27/01 , H01L23/31 , H01L23/552 , H01L23/528 , H01L23/498 , H01L21/768 , H01L21/56 , H01L23/522 , H03H7/01 , H03H7/46 , H04B1/00
CPC classification number: H01L27/01 , H01L21/56 , H01L21/76885 , H01L23/3121 , H01L23/3128 , H01L23/3135 , H01L23/49805 , H01L23/5226 , H01L23/5286 , H01L23/552 , H01L24/13 , H01L24/16 , H01L2224/131 , H01L2224/16227 , H01L2224/16235 , H01L2924/14 , H01L2924/15313 , H01L2924/1815 , H01L2924/19011 , H01L2924/3025 , H03H7/0115 , H03H7/468 , H04B1/0057 , H01L2924/014 , H01L2924/00014
Abstract: An integrated circuit (IC) device includes a die having an integrated passive device (IPD) layer. The integrated circuit device also includes a substrate supporting the die, a molding compound surrounding the die. The integrated circuit device further includes a backside conductive layer on a surface of the die that is distal from the IPD layer. The integrated circuit device also includes vias coupling the backside conductive layer to a ground plane through the molding compound.
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公开(公告)号:US20180077803A1
公开(公告)日:2018-03-15
申请号:US15261838
申请日:2016-09-09
Applicant: QUALCOMM Incorporated
Inventor: Changhan Hobie YUN , David Francis BERDY , Chengjie ZUO , Jonghae KIM , Niranjan Sunil MUDAKATTE , Mario Francisco VELEZ , Shiqun GU
CPC classification number: H05K1/185 , H01G4/224 , H01G4/236 , H01G4/33 , H01L23/49822 , H01L23/52 , H05K1/162 , H05K3/4602 , H05K3/4682 , H05K3/4688
Abstract: Due to the presence of a glass substrate, it is difficult to fabricate thin conventional passive-on-glass (POG) devices. Also glass dicing has been a throughput bottleneck in fabricating the conventional POG device. To address such disadvantages, devices without the glass substrates are proposed. Support structures may be provided to provide mechanical support. The devices are significantly thinner and allow access to the passive components from both first and second surfaces, which are opposite and exposed surfaces. The proposed POM devices may also be incorporated in a package substrate.
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公开(公告)号:US20170372989A1
公开(公告)日:2017-12-28
申请号:US15190164
申请日:2016-06-22
Applicant: QUALCOMM Incorporated
Inventor: Daeik Daniel KIM , Mario Francisco VELEZ , Changhan Hobie YUN , David Francis BERDY , Chengjie ZUO , Jonghae KIM
IPC: H01L23/498 , H01L21/48 , H01L21/60 , H01L23/31
CPC classification number: H01L23/49805 , H01L21/4846 , H01L23/3121 , H01L23/49811 , H01L2021/60007 , H01L2224/081 , H01L2224/09155 , H01L2224/16113 , H01L2224/16225
Abstract: A device package with a reduced foot print may include a substrate and a through-substrate via extending from a top surface to a bottom surface of the substrate. The assembly may also include a trace and a contact pad on the top and bottom surfaces of the substrate and electrically coupled to the through-substrate via. An encapsulated die above the substrate may be electrically coupled to the trace. A joint below the substrate may be electrically coupled to the contact pad. A sidewall of the through-substrate via may be exposed. At least a portion of the through-substrate via may be within an outer side boundary of the substrate. Also, the trace and the contact pad may be within the outer side boundary of the substrate.
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70.
公开(公告)号:US20170187345A1
公开(公告)日:2017-06-29
申请号:US15067106
申请日:2016-03-10
Applicant: QUALCOMM Incorporated
Inventor: Changhan Hobie YUN , Daeik Daniel KIM , Mario Francisco VELEZ , Chengjie ZUO , David Francis BERDY , Jonghae KIM
CPC classification number: H01P5/16 , H01Q1/22 , H01Q1/50 , H03H7/0115 , H03H7/463
Abstract: A multiplexer structure includes a passive substrate. The multiplexer structure may also include a high band filter on the passive substrate. The high band filter may include a 2D planar spiral inductor(s) on the passive substrate. The multiplexer structure may further include a low band filter on the passive substrate. The low band filter may include a 3D through-substrate inductor and a first capacitor(s) on the passive substrate. The multiplexer structure may also include a through substrate via(s) coupling the high band filter and the low band filter.
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