公开(公告)号：US11557720B2

公开(公告)日：2023-01-17

申请号：US17110524

申请日：2020-12-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyunghwan Lee ,  Yongseok Kim ,  Kohji Kanamori ,  Unghwan Pi ,  Hyuncheol Kim ,  Sungwon Yoo ,  Jaeho Hong

IPC: H01L43/08 ,  H01L27/22 ,  H01L43/10 ,  G11C11/16 ,  H01L23/522 ,  H01L43/02

Abstract: A memory device includes a magnetic track layer extending on a substrate, the magnetic track layer having a folded structure that is two-dimensionally villi-shaped, a plurality of reading units including a plurality of fixed layers and a tunnel barrier layer between the magnetic track layer and each of the plurality of fixed layers, and a plurality of bit lines extending on different ones of the plurality of reading units, the plurality of reading units being between the magnetic track layer and corresponding ones of the plurality of bit lines.

公开(公告)号：US11456313B2

公开(公告)日：2022-09-27

申请号：US16710198

申请日：2019-12-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyunghwan Lee ,  Yongseok Kim ,  Kohji Kanamori ,  Minhan Shin

IPC: H01L27/11565 ,  H01L27/11582 ,  H01L27/11573 ,  H01L27/1157

Abstract: Three-dimensional semiconductor memory devices are provided. A three-dimensional semiconductor memory device includes a stack structure that includes gate electrodes on a substrate. The three-dimensional semiconductor memory device includes a first vertical structure, a second vertical structure, a third vertical structure, and a fourth vertical structure that penetrate the stack structure and are sequentially arranged in a zigzag shape along a first direction. Moreover, the three-dimensional semiconductor memory device includes a first bit line that extends in the first direction. The first bit line vertically overlaps the second vertical structure and the fourth vertical structure. Centers of the second and fourth vertical structures are spaced apart at the same distance from the first bit line. The first vertical structure is spaced apart at a first distance from the first bit line. The third vertical structure is spaced apart at a second distance from the first bit line.

公开(公告)号：US11322544B2

公开(公告)日：2022-05-03

申请号：US16734937

申请日：2020-01-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyunghwan Lee ,  Yongseok Kim ,  Taehun Kim ,  Seokhan Park ,  Satoru Yamada ,  Jaeho Hong

IPC: H01L27/24 ,  G11C16/10 ,  G11C16/26 ,  G11C13/00 ,  H01L45/00 ,  H01L27/11524 ,  H01L27/1157

Abstract: A vertical semiconductor device includes: a channel on a substrate, the channel extending in a first direction substantially perpendicular to an upper surface of the substrate; a first data storage structure contacting a first sidewall of the channel; a second data storage structure on a second sidewall of the channel; and gate patterns on a surface of the second data storage structure, wherein the gate patterns are spaced apart from each other in the first direction, and the gate patterns extend in a second direction substantially parallel to the upper surface of the substrate.

公开(公告)号：US20220028975A1

公开(公告)日：2022-01-27

申请号：US17225716

申请日：2021-04-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyunghwan Lee ,  Yongseok Kim ,  Hyuncheol Kim ,  Sungwon Yoo ,  Jaeho Hong

IPC: H01L29/10 ,  H01L29/06 ,  H01L29/786

Abstract: A semiconductor device includes a gate electrode on a substrate, a channel surrounding sidewalls of the gate electrode on the substrate, and source/drain electrodes on the substrate at opposite sides of the gate electrode in a first direction parallel to an upper surface of the substrate. A thickness of the channel from the gate electrode to the source/drain electrodes in a horizontal direction parallel to the upper surface of the substrate is not constant but varies in a vertical direction perpendicular to the upper surface of the substrate.

公开(公告)号：US20200343307A1

公开(公告)日：2020-10-29

申请号：US16657453

申请日：2019-10-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyunghwan Lee ,  Yongseok Kim ,  Kohji Kanamori

IPC: H01L27/24 ,  H01L45/00

Abstract: A semiconductor memory device includes a stack structure comprising a plurality of insulating layers and a plurality of interconnection layers that are alternately and repeatedly stacked. A pillar structure is disposed on a side surface of the stack structure. The pillar structure includes an insulating pillar and a variable resistance layer disposed on the insulating pillar and positioned between insulating pillar and the stack structure. A channel layer is disposed on the variable resistance layer and is positioned between the variable resistance layer and the stack structure. A gate dielectric layer is disposed on the channel layer and is positioned between the plurality of interconnection layers and the channel layer. The channel layer is disposed between the variable resistance layer and the gate dielectric layer.

公开(公告)号：US10818689B2

公开(公告)日：2020-10-27

申请号：US16232549

申请日：2018-12-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyunghwan Lee ,  Changseok Kang ,  Yongseok Kim ,  Junhee Lim ,  Kohji Kanamori

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/1157 ,  H01L29/423 ,  H01L21/311 ,  H01L27/11573 ,  H01L21/28

Abstract: Provided are three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor memory device includes a plurality of electrode structures provided on a substrate and extending in parallel to each other in one direction and each including electrodes and insulating layers alternately stacked on the substrate, a plurality of vertical structures penetrating the plurality of electrode structures, and an electrode separation structure disposed between two of the plurality of electrode structures adjacent to each other. Each of the electrodes includes an outer portion adjacent to the electrode separation structure, and an inner portion adjacent to the plurality of vertical structures. A thickness of the outer portion is smaller than a thickness of the inner portion.

公开(公告)号：US20200303410A1

公开(公告)日：2020-09-24

申请号：US16714941

申请日：2019-12-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kohji Kanamori ,  Yongseok Kim ,  Kyunghwan Lee ,  Junhee Lim

IPC: H01L27/11582 ,  G11C16/04 ,  H01L27/11565 ,  H01L27/11573

Abstract: Three-dimensional semiconductor memory devices are provided. A three-dimensional semiconductor memory device includes a plurality of word line blocks including a plurality of cell strings that are connected in parallel between a bit line and a common source line. Each of the cell strings includes a plurality of memory cell transistors that are stacked on a substrate in a vertical direction, a plurality of ground selection transistors that are connected in series between the plurality of memory cell transistors and the substrate, and a string selection transistor that is between the plurality of memory cell transistors and the bit line. In each of the cell strings, at least one of the plurality of ground selection transistors has a first threshold voltage, and remaining ones of the ground selection transistors have a second threshold voltage different from the first threshold voltage. Related methods of operating three-dimensional semiconductor memory devices are also provided.

公开(公告)号：US10462756B2

公开(公告)日：2019-10-29

申请号：US16100849

申请日：2018-08-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongseok Kim ,  Hyunseok Ryu ,  Hyunkyu Yu

IPC: H04W52/14 ,  H04W52/48 ,  H04W52/12 ,  H04W52/16 ,  H04W52/22 ,  H04W52/50

Abstract: The present disclosure relates to a communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT). The present disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services.A method for transmitting data by a terminal in a mobile communication system, a method for receiving data by a base station in a mobile communication system, a terminal in a mobile communication system, and a base station in a mobile communication system are provided. The method for transmitting data by a terminal in a mobile communication system includes receiving, from a base station, first control information for transmitting a first data; after receiving the first control information, receiving, from the base station, second control information for transmitting a second data; transmitting, to the base station, the second data corresponding to the second control information; and after transmitting the second data, determining a transmission power of the first data corresponding to the first control information based on a transmission power of the second data.