公开(公告)号：US12143729B2

公开(公告)日：2024-11-12

申请号：US17538833

申请日：2021-11-30

Applicant: Texas Instruments Incorporated

Inventor： Gang Hua ,  Mihir Narendra Mody ,  Niraj Nandan ,  Shashank Dabral ,  Rajasekhar Reddy Allu ,  Denis Roland Beaudoin

IPC: H04N23/84 ,  H04N9/67 ,  H04N9/68

Abstract: A technique for image processing, comprising: receiving input image data, wherein the image data is companded into a first bit depth, wherein the image data includes incomplete color values for pixels of the image data, and wherein the image data is associated with a first color space, interpolating the image data to generate color values for the incomplete color values for pixels of the image data, expanding the image data from the first bit depth to a second bit depth, wherein the color values of the expanded image data have a linear dynamic range, and wherein the second bit depth is higher than the first bit depth, converting the color values for pixels of the expanded image data from the first color space to a second color space, and compressing the color values for pixels of the image data to a third bit depth, the third bit depth lower than the second bit depth, and wherein the compressed color values have a nonlinear dynamic range.

公开(公告)号：US20240323406A1

公开(公告)日：2024-09-26

申请号：US18735496

申请日：2024-06-06

Applicant: Texas Instruments Incorporated

Inventor： Mihir Narendra Mody ,  Niraj Nandan ,  Hideo Tamama

IPC: H04N19/176 ,  H04N19/117 ,  H04N19/14 ,  H04N19/186 ,  H04N19/82 ,  H04N19/86

CPC classification number: H04N19/176 ,  H04N19/117 ,  H04N19/14 ,  H04N19/82 ,  H04N19/86 ,  H04N19/186

Abstract: A method of de-blocking filtering a processed video is provided. The processed video includes a plurality of blocks and each block includes a plurality of sub-blocks. A current block of the plurality of blocks includes vertical edges and horizontal edges. The processed video further includes a set of control parameters and reconstructed pixels corresponding to the current block. A boundary strength index is estimated at the vertical edges and at the horizontal edges of the current block. The set of control parameters, the reconstructed pixels corresponding to the current block and partially filtered pixels corresponding to a set of adjacent sub-blocks are loaded. The vertical edges and the horizontal edges of the current block are filtered based on the boundary strength index and the set of control parameters such that a vertical edge of the current block is filtered before filtering at least one horizontal edge of the current block.

公开(公告)号：US20240089425A1

公开(公告)日：2024-03-14

申请号：US18510884

申请日：2023-11-16

Applicant: Texas Instruments Incorporated

Inventor： Niraj Nandan ,  Brian Chae ,  Mihir Mody ,  Rajasekhar Reddy Allu

IPC: H04N17/00 ,  H04N5/14 ,  H04N7/18

CPC classification number: H04N17/004 ,  H04N5/144 ,  H04N7/183

Abstract: Devices, systems, and methods detect an image frame freeze condition. An example device includes a core logic circuit configured to generate statistics for received image data associated with an image frame, perform a census transform on pixel values of the image data to generate census transformed data, arrange the census transformed data into a binary string having a binary value, and generate transformed image data by replacing a select pixel value of the pixel values of the image data with a decimal value corresponding to the binary value; a load/store engine (LSE) coupled to the core logic circuit, the LSE configured to determine a cyclic redundancy check (CRC) value based on at least one of the image data, the transformed image data, and at least one statistic of the statistics; and an interface configured to transmit the CRC value to a host device.

公开(公告)号：US20240040266A1

公开(公告)日：2024-02-01

申请号：US18147964

申请日：2022-12-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Hrushikesh Garud ,  Rajasekhar Allu ,  Gang Hua ,  Jing-Fei Ren ,  Mayank Mangla ,  Niraj Nandan ,  Mihir Mody ,  Pandy Kalimuthu

IPC: H04N23/76 ,  H04N23/11 ,  H04N23/84 ,  H04N23/81

CPC classification number: H04N23/76 ,  H04N23/11 ,  H04N23/843 ,  H04N23/81 ,  H04N23/667

Abstract: A system is provided. The system generally includes a first processor configured to receive image input data from a red-green-blue infrared (RGBIR) sensor. The first processor of the system is configured to generate a first intermediate image data from the image input data. The system generally includes a second processor. The second processor of the system is configured to generate a second intermediate image data that includes red-green-blue (RGB) image data from the first intermediate image data, and to generate a third intermediate image data that includes infrared (IR) image data from the first intermediate image data. The system generally includes a third processor. The third processor of the system is configured to process the third intermediate image data. The system generally includes a fourth processor. The fourth processor of the system is configured to process the second image data.

公开(公告)号：US11743612B2

公开(公告)日：2023-08-29

申请号：US17555145

申请日：2021-12-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Gang Hua ,  Rajasekhar Reddy Allu ,  Mihir Narendra Mody ,  Niraj Nandan ,  Mayank Mangla ,  Pandy Kalimuthu

IPC: H04N25/611 ,  G06T3/40 ,  G06T1/60 ,  H04N25/13

CPC classification number: H04N25/611 ,  G06T1/60 ,  G06T3/4015 ,  H04N25/13

Abstract: In the advanced driver-assistance systems (ADAS) field, RAW sensor image processing for machine vision (MV) applications can be of critical importance. Due to red/green/blue (RGB) image components being focused by the lens at different locations in image plane, the lateral chromatic aberration (LCA) phenomenon may sometimes be observed, which causes false color around edges in the final image output, especially for high contrast edges, which can impede MV applications. Disclosed herein are low-latency, efficient, optimized designs for chromatic aberration correction (CAC) modules. In some embodiments, an in-pipeline CAC design is used that: is configured to perform on-the-fly CAC without any out-of-pipeline memory traffic; enables use of wide dynamic range (WDR) sensors; uses bicubic interpolation; supports vertical and horizontal chromatic aberration red/blue color channel offsets, reduces CAC line memory requirements, and supports flexible look-up table (LUT) down-sampling factors to improve the spatial precision of correction and accommodate popular image sensor resolutions.

公开(公告)号：US20230232022A1

公开(公告)日：2023-07-20

申请号：US18123432

申请日：2023-03-20

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Mihir Narendra Mody ,  Niraj Nandan ,  Hideo Tamama

IPC: H04N19/176 ,  H04N19/14 ,  H04N19/82 ,  H04N19/86 ,  H04N19/117

CPC classification number: H04N19/176 ,  H04N19/14 ,  H04N19/82 ,  H04N19/86 ,  H04N19/117 ,  H04N19/186

Abstract: A method of de-blocking filtering a processed video is provided. The processed video includes a plurality of blocks and each block includes a plurality of sub-blocks. A current block of the plurality of blocks includes vertical edges and horizontal edges. The processed video further includes a set of control parameters and reconstructed pixels corresponding to the current block. A boundary strength index is estimated at the vertical edges and at the horizontal edges of the current block. The set of control parameters, the reconstructed pixels corresponding to the current block and partially filtered pixels corresponding to a set of adjacent sub-blocks are loaded. The vertical edges and the horizontal edges of the current block are filtered based on the boundary strength index and the set of control parameters such that a vertical edge of the current block is filtered before filtering at least one horizontal edge of the current block.

公开(公告)号：US11682212B2

公开(公告)日：2023-06-20

申请号：US17086560

申请日：2020-11-02

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Hetul Sanghvi ,  Mihir Narendra Mody ,  Niraj Nandan ,  Anish Reghunath ,  Michael Peter Lachmayr

IPC: G06T7/00 ,  G06V20/52 ,  G06T7/20 ,  G06T1/00 ,  G06T7/269 ,  G06V20/64

CPC classification number: G06V20/52 ,  G06T1/0007 ,  G06T7/20 ,  G06T7/269 ,  G06V20/64 ,  G06T2200/28 ,  G06T2207/10004 ,  G06T2207/20016 ,  G06T2207/20032 ,  G06T2207/30252

Abstract: A computer vision system is provided that includes an image generation device configured to capture consecutive two dimensional (2D) images of a scene, a first memory configured to store the consecutive 2D images, a second memory configured to store a growing window of consecutive rows of a reference image and a growing window of consecutive rows of a current image, wherein the reference image and the current image are a pair of consecutive 2D images stored in the first memory, a third memory configured to store a sliding window of pixels fetched from the growing window of the reference image, wherein the pixels in the sliding window are stored in tiles, and a dense optical flow engine (DOFE) configured to determine a dense optical flow map for the pair of consecutive 2D images, wherein the DOFE uses the sliding window as a search window for pixel correspondence searches.

公开(公告)号：US11669370B2

公开(公告)日：2023-06-06

申请号：US17012223

申请日：2020-09-04

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Niraj Nandan ,  Hetul Sanghvi ,  Mihir Narendra Mody

IPC: G06F9/46 ,  G06F9/50 ,  G06F9/48 ,  G06F11/07 ,  G06F9/52

CPC classification number: G06F9/5044 ,  G06F9/4887 ,  G06F9/52 ,  G06F11/0757

Abstract: A hardware thread scheduler (HTS) is provided for a multiprocessor system. The HTS is configured to schedule processing of multiple threads of execution by resolving data dependencies between producer modules and consumer modules for each thread. Pattern adaptors may be provided in the scheduler that allows mixing of multiple data patterns across blocks of data. Transaction aggregators may be provided that allow re-using the same image data by multiple threads of execution while the image data remains in a given data buffer. Bandwidth control may be provided using programmable delays on initiation of thread execution. Failure and hang detection may be provided using multiple watchdog timers.

公开(公告)号：US11653105B2

公开(公告)日：2023-05-16

申请号：US17110139

申请日：2020-12-02

Applicant: Texas Instruments Incorporated

Inventor： Gang Hua ,  Shashank Dabral ,  Mihir Narendra Mody ,  Rajasekhar Reddy Allu ,  Niraj Nandan

IPC: H04N23/88 ,  H04N23/74 ,  H04N23/71 ,  H04N9/78 ,  H04N23/76 ,  H04N23/741

CPC classification number: H04N23/88 ,  H04N9/78 ,  H04N23/71 ,  H04N23/741 ,  H04N23/76

Abstract: A method for local automatic white balance (AWB) of wide dynamic range (WDR) images is provided that includes collecting statistics for local AWB by an image signal processor (ISP) from a first WDR image generated by the ISP, receiving, by the ISP, a plurality of local gain lookup tables (LUTs), one for each color channel, wherein the plurality of local gain LUTs is generated using the statistics, and applying, by the ISP, a gain value to each pixel in a second WDR image generated by the ISP, wherein the gain value for the pixel is determined by the ISP using the local gain LUT for the color channel of the pixel.

公开(公告)号：US11586465B2

公开(公告)日：2023-02-21

申请号：US17138649

申请日：2020-12-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Niraj Nandan ,  Mihir Mody

IPC: G06F9/48 ,  G06F9/30 ,  G06F9/38 ,  G06F9/54

Abstract: A device includes a hardware data processing node configured to execute a respective task, and a hardware thread scheduler including a hardware task scheduler. The hardware task scheduler is coupled to the hardware data processing node and has a producer socket, a consumer socket, and a spare socket. The spare socket is configured to provide data control signals also provided by a first socket of the producer and consumer sockets responsive to a memory-mapped register being a first value. The spare socket is configured to provide data control signals also provided by a second socket of the producer and consumer sockets responsive to the memory-mapped register being a second value.