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公开(公告)号:US12168399B2
公开(公告)日:2024-12-17
申请号:US17931158
申请日:2022-09-12
Applicant: Trek Bicycle Corporation
Inventor: Jon Quenzer
IPC: B60L53/20 , B62J43/13 , B62J43/20 , B62M6/45 , B62M6/90 , H02J7/00 , H02M1/08 , H02M3/156 , H02P7/292
Abstract: A battery boost converter system for a bicycle includes a bicycle frame and a motor mounted to the bicycle frame. The system also includes a battery mounted to the bicycle frame and configured to provide power to the motor. The system also includes a boost converter configured to receive a first output signal from the battery and to provide a second output signal to the motor. The boost converter is also configured to determine, based on an operating condition, whether to boost a voltage of the first output signal such that the second output signal has an increased voltage.
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62.
公开(公告)号:US12166421B2
公开(公告)日:2024-12-10
申请号:US18488952
申请日:2023-10-17
Applicant: Navitas Semiconductor Limited
Inventor: Victor Sinow , Weijing Du
Abstract: Systems and methods that automatically detect state of switches in power converters are disclosed. In one aspect, a power switch includes a first switch coupled between a power input node and a first terminal of a load, a second switch coupled between the power input node and a second terminal of the load, first and second current sense devices arranged to transmit first and second signals including at least one of a magnitude and polarity of first and second currents through the first and second switches, respectively, a first driver circuit arranged to transmit first control signals to the first switch based at least in part on a voltage at the power input node and the first signal, and a second driver circuit arranged to transmit second control signals to the second switch based at least in part on the voltage at the power input node and the second signal.
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公开(公告)号:US12166419B2
公开(公告)日:2024-12-10
申请号:US17806521
申请日:2022-06-13
Applicant: ROHM Co., LTD.
Inventor: Shun Fukushima , Tomohisa Shinozaki , Tsutomu Ishino
Abstract: Disclosed is a control circuit of a boost DC-DC converter including a high side transistor and a low side transistor, and a load switch connected between the high side transistor and an output line of the boost DC-DC converter. The control circuit includes a pulse modulator that generates a pulse signal with a pulse modulated to bring an output voltage of the output line close to a target level, a logic circuit that generates a high side control signal and a low side control signal based on the pulse signal, a load switch drive circuit that drives a first PMOS transistor provided as the load switch, and a current detection circuit that generates a current detection signal indicating a current flowing through the first PMOS transistor. The load switch drive circuit is switchable between a first mode and a second mode.
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公开(公告)号:US12166418B2
公开(公告)日:2024-12-10
申请号:US17556666
申请日:2021-12-20
Inventor: Shungen Sun , Hanfei Yang
Abstract: A control circuit for a switched-mode power converter to generate a control signal for controlling switching transistors in the power converter is disclosed. The control circuit includes: a comparator; a ramp compensation circuit for producing and applying a ramp compensation signal to a first or second input of the comparator; an on-time generation circuit to generate an on-time timer signal; and a control signal generation circuit to generate, based on the comparison signal and the on-time timer signal, the control signal for controlling the switching transistors in the power converter. The ramp compensation signal output from the ramp compensation circuit is configured with: a first slope during an inductor demagnetization interval in operation of the power converter in CCM and a second slope during an inductor demagnetization interval and a zero-current interval in operation of the power converter in DCM, the first slope is greater than the second slope.
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65.
公开(公告)号:US12162366B2
公开(公告)日:2024-12-10
申请号:US18065721
申请日:2022-12-14
Applicant: BorgWarner US Technologies LLC
Inventor: Jack Lavern Glenn , Mark Russell Keyse , Marc R. Engelhardt , Kevin M. Gertiser
IPC: B60L50/60 , B60L3/00 , B60L15/00 , B60L15/08 , B60L50/40 , B60L50/51 , B60L50/64 , B60L53/20 , B60L53/22 , B60L53/62 , B60R16/02 , G01R15/20 , G06F1/08 , G06F13/40 , H01L21/48 , H01L23/00 , H01L23/15 , H01L23/367 , H01L23/373 , H01L23/40 , H01L23/467 , H01L23/473 , H01L23/495 , H01L23/538 , H01L25/00 , H01L25/07 , H01L29/66 , H02J7/00 , H02M1/00 , H02M1/08 , H02M1/084 , H02M1/088 , H02M1/12 , H02M1/32 , H02M1/42 , H02M1/44 , H02M3/335 , H02M7/00 , H02M7/537 , H02M7/5387 , H02M7/5395 , H02P27/06 , H02P27/08 , H02P29/024 , H02P29/68 , H05K1/14 , H05K1/18 , H05K5/02 , H05K7/20 , B60L15/20 , H03K19/20
Abstract: A system comprises an inverter configured to convert DC power from a battery to AC power to drive a motor, wherein the inverter includes: a galvanic isolator separating a high voltage area from a low voltage area; a low voltage phase controller in the low voltage area, the low voltage phase controller configured to receive a pulse width modulation (PWM) signal from an inverter controller and adjust the received PWM signal based on a feedback signal; and a high voltage phase controller in the high voltage area, the high voltage phase controller configured to receive the adjusted PWM signal from the low voltage phase controller, provide the adjusted PWM signal to a phase switch, and provide the feedback signal based on an on-time measurement of the phase switch.
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公开(公告)号:US20240396471A1
公开(公告)日:2024-11-28
申请号:US18574755
申请日:2021-07-07
Applicant: Mitsubishi Electric Corporation
Inventor: Ryota ASAKURA , Yusuke SHIROUCHI , Kenji FUJIWARA , Tetsuya KOJIMA
Abstract: A gradationally controlled voltage inverter, which is a power conversion device, controls a gate impedance of a main inverter before a capacitor voltage VDCS of a sub-inverter is controlled at a predetermined voltage so as to be larger than a gate impedance of the main inverter after the capacitor voltage VDCS of the sub-inverter is controlled at the predetermined voltage. This reduces the noise caused by the main inverter when the capacitor voltage VDCS of the sub-inverter is not controlled at the predetermined voltage.
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67.
公开(公告)号:US20240395678A1
公开(公告)日:2024-11-28
申请号:US18323600
申请日:2023-05-25
Applicant: Mitsubishi Electric Corporation
Inventor: Yasunari HINO , Kiyoshi ARAI , Taketoshi SHIKANO
IPC: H01L23/495 , H01L23/00 , H01L23/367 , H01L23/373 , H02M1/08
Abstract: A semiconductor device with improved reliability and a power conversion device including the semiconductor device are provided. A semiconductor device includes a semiconductor element, a first heat dissipation substrate, a second heat dissipation substrate, and a heat dissipation block. The semiconductor element has an electrode. The semiconductor element is mounted on the first heat dissipation substrate. The heat dissipation block is disposed to be opposed to the electrode. The second heat dissipation substrate is disposed on a side opposite to the electrode as viewed from the heat dissipation block. The bonding material covers a side surface of the heat dissipation block and is in contact with the electrode of the semiconductor element and the second heat dissipation substrate.
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公开(公告)号:US12149177B2
公开(公告)日:2024-11-19
申请号:US17956442
申请日:2022-09-29
Applicant: Hangzhou MPS Semiconductor Technology Ltd.
Inventor: Xuefeng Chen , Hui Li
Abstract: A control method of a zero-voltage switching converter with quasi-resonant control, the converter has a first switch and second switch respectively coupled to a primary winding and an auxiliary winding. The control method is: generating a hysteresis feedback signal based on an output feedback signal indicative of an output signal of the converter; comparing the hysteresis feedback signal with a ramp signal and generating a first comparison signal; comparing the output feedback signal with the ramp signal and generating a second comparison signal; generating a target locked valley number based on a valley pulse signal indicative of valleys of a voltage drop across the second switch, the first and second comparison signals; generating a turning on control signal corresponding to the target locked valley number for the second switch; and providing a control signal to turn on the first switch after turning off the second switch.
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公开(公告)号:US12143110B2
公开(公告)日:2024-11-12
申请号:US18010229
申请日:2021-06-15
Applicant: Ariel Scientific Innovations Ltd.
Inventor: Joseph B. Bernstein , Ilan Aharon
IPC: H03K3/0231 , H02M1/08 , H02M1/38 , H02M3/158 , H03K3/011 , H03K3/03 , H03K5/24 , H03K7/08 , H03K17/30
Abstract: An integrated circuit is built with enhancement mode Gallium Nitride (GaN) components. The integrated circuit comprises a comparator circuit which compares an input voltage with a reference voltage to provide a controllable constant current source, the comparator having a drive transistor having a positive threshold voltage, the drive transistor being switched on and off based on a comparison result of the comparator. The circuit may drive ring oscillators and may provide pulse width modulation with variable duty cycle at constant frequency.
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公开(公告)号:US12143028B2
公开(公告)日:2024-11-12
申请号:US17794053
申请日:2021-01-26
Applicant: General Electric Technology GmbH
Inventor: Chandra Mohan Sonnathi , Rajaseker Reddy Ginnareddy , Carl Barker
Abstract: Embodiments of the disclosure include an electrical assembly. The electrical assembly can include a converter including a DC side and an AC side, the DC side configured for connection to a DC network, the AC side configured for connection to an AC network, the converter including at least one switching element; a circuit interruption device operably connected to the AC side of the converter; a DC voltage modification device operably connected to the DC side of the converter, the DC voltage modification device including a DC chopper; and a controller configured to selectively control the or each switching element, the circuit interruption device and the DC voltage modification device, wherein the controller is configured to be responsive to a converter internal fault by carrying out a fault operating mode.
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