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    Array substrate for liquid crystal display device and method of fabricating the same
    71.
    发明授权
    Array substrate for liquid crystal display device and method of fabricating the same 有权
    液晶显示装置用阵列基板及其制造方法

    公开(公告)号：US08629951B2

    公开(公告)日：2014-01-14

    申请号：US12314558

    申请日：2008-12-12

    Applicant: Sang-Hyup Lee ,  Jin-Seok Lee

    Inventor： Sang-Hyup Lee ,  Jin-Seok Lee

    IPC: G02F1/1333 ,  G02F1/1343 ,  G02F1/13

    CPC classification number: G02F1/136259 ,  G02F2001/13606 ,  G02F2001/136263 ,  G02F2001/136268 ,  G02F2001/13629 ,  G02F2201/40 ,  H01L27/124 ,  H01L27/1259

    Abstract: A liquid crystal display device includes an array substrate and a color filter substrate, a plurality of gate lines and a plurality of data lines formed on the array substrate such that the gate lines and the data lines intersect each other to define a plurality of pixel regions, a plurality of thin film transistors formed at respective intersections of the gate lines and the data lines, a liquid crystal layer interposed between the array and color filter substrates, and a plurality of repair patterns formed on the first substrate. Each of the plurality of the repair patterns crosses a corresponding one of the data lines, and is along and adjacent to a corresponding one of the gate lines, such that the repair pattern includes protruding ends that protrude from the corresponding data line to repair a defect on the pixel regions.

    Abstract translation: 液晶显示装置包括阵列基板和滤色器基板，形成在阵列基板上的多条栅极线和多条数据线，使得栅极线和数据线彼此相交以限定多个像素区域 形成在栅极线和数据线的各交叉点处的多个薄膜晶体管，插入在阵列和滤色器基板之间的液晶层，以及形成在第一基板上的多个修复图案。 多个修复图案中的每一个都与相应的数据线交叉，并且与相应的一条栅极线相邻并相邻，使得修复图案包括从对应的数据线突出以修复缺陷的突出端 在像素区域上。

    CORE SYSTEM FOR PROCESSING AN INTERRUPT AND METHOD FOR TRANSMISSION OF VECTOR REGISTER FILE DATA THEREFOR
    72.
    发明申请
    CORE SYSTEM FOR PROCESSING AN INTERRUPT AND METHOD FOR TRANSMISSION OF VECTOR REGISTER FILE DATA THEREFOR 审中-公开
    用于处理中断的核心系统和用于传输矢量寄存器文件数据的方法

    公开(公告)号：US20130238877A1

    公开(公告)日：2013-09-12

    申请号：US13672756

    申请日：2012-11-09

    Applicant: Jin-Seok Lee ,  Dong-Hoon Yoo ,  Won-Sub Kim ,  Tai-Song Jin ,  Hae-Woo Park ,  Min-Wook Ahn ,  Hee-Jin Ahn

    Inventor： Jin-Seok Lee ,  Dong-Hoon Yoo ,  Won-Sub Kim ,  Tai-Song Jin ,  Hae-Woo Park ,  Min-Wook Ahn ,  Hee-Jin Ahn

    IPC: G06F15/76

    CPC classification number: G06F9/5016 ,  G06F9/461

    Abstract: Provided is a technique for improving the transfer latency of vector register file data when an interrupt is generated. According to an aspect, when interrupt occurs, a core determines whether to store vector register file data currently being executed in a first memory or in a second memory based on whether or not the first memory can store the vector register file data therein. In response to not being able to store the vector register file data in the first memory, a data transfer unit, which is implemented as hardware, is provided to store vector register file data in the second memory.

    Abstract translation: 提供了一种用于在产生中断时改善向量寄存器文件数据的传送等待时间的技术。 根据一方面，当中断发生时，核心基于第一存储器是否可以在其中存储向量寄存器文件数据来确定是否将当前正在执行的向量寄存器文件数据存储在第一存储器或第二存储器中。 响应于不能将向量寄存器文件数据存储在第一存储器中，提供实现为硬件的数据传送单元，以将向量寄存器文件数据存储在第二存储器中。

    Method of preparing substrates—molecular sieve layers complex using ultrasound and apparatuses used therein
    73.
    发明授权
    Method of preparing substrates—molecular sieve layers complex using ultrasound and apparatuses used therein 有权
    使用超声波制备底物 - 分子筛层复合物的方法及其中使用的装置

    公开(公告)号：US08288302B2

    公开(公告)日：2012-10-16

    申请号：US11629375

    申请日：2005-06-23

    Applicant: Kyung Byung Yoon ,  Jin Seok Lee ,  Kwang Ha ,  Yun-Jo Lee ,  Yong Chang

    Inventor： Kyung Byung Yoon ,  Jin Seok Lee ,  Kwang Ha ,  Yun-Jo Lee ,  Yong Chang

    IPC: B01J29/06

    CPC classification number: C23C22/02 ,  B82Y15/00 ,  C03C17/002 ,  C03C17/007 ,  C03C17/009 ,  C03C2217/23 ,  C03C2217/465 ,  C03C2217/475 ,  C23C26/00 ,  C23C30/00

    Abstract: The present invention relates to a method for preparing substrate-molecular sieve layer complex by vising ultra-sound and apparatuses used therein, more particularly to a method for preparing substrate-molecular sieve layer complex by combining substrate, coupling compound and molecular sieve particle, wherein covalent, ionic, coordinate or hydrogen bond between a substrate and a coupling compound; molecular sieve particle and coupling compound; coupling compounds; coupling compound and intermediate coupling compound is induced by using 15 KHz-100 MHz of ultrasound instead of simple reflux to combine substrate and molecular sieve particles by various processes, further to reduce time and energy, to retain high binding velocity, binding strength, binding intensity and density remarkably, to attach molecular sieve particle uniformly onto all substrates combined with coupling compound selectively, even though substrate with coupling compound and substrate without coupling compound exist together; and apparatuses installed therein, which can improve to produce substrate-molecular sieve layer complex in a large scale.

    Abstract translation: 本发明涉及一种通过超声波和其中使用的装置制备底物 - 分子筛层复合物的方法，更具体地涉及一种通过将底物，偶联化合物和分子筛颗粒组合制备底物 - 分子筛层复合物的方法，其中 底物和偶联化合物之间的共价，离子，配位或氢键; 分子筛颗粒和偶联剂; 偶联化合物; 通过使用15KHz-100MHz的超声波而不是简单回流来诱导偶联化合物和中间偶联化合物，以通过各种方法将底物和分子筛颗粒结合在一起，进一步减少时间和能量，以保持高结合速度，结合强度，结合强度 和密度显着地将分子筛颗粒均匀地附着在与偶联化合物组合的所有基材上，即使具有偶联化合物的底物和没有偶联化合物的底物一起存在; 以及安装在其中的装置，其可以改进以大规模生产基质 - 分子筛层复合物。

    Single crystal silicon carbaide nanowire, method of preparation thereof, and filter comprising the same
    74.
    发明申请
    Single crystal silicon carbaide nanowire, method of preparation thereof, and filter comprising the same 有权
    单晶碳化硅纳米线，其制备方法和包含该纳米线的过滤器

    公开(公告)号：US20100293910A1

    公开(公告)日：2010-11-25

    申请号：US11919809

    申请日：2007-08-16

    Applicant: Sung Churl Choi ,  Sang-Hoon Lee ,  Jin-Seok Lee ,  Yun-Ki Byeun

    Inventor： Sung Churl Choi ,  Sang-Hoon Lee ,  Jin-Seok Lee ,  Yun-Ki Byeun

    IPC: C01B31/36 ,  D02G3/02 ,  C30B1/10 ,  B01D39/20

    CPC classification number: B01D39/2041 ,  B01D2239/025 ,  Y10T428/298

    Abstract: Single-crystal silicon carbide nanowires and a method for producing the nanowires are provided. The single-crystal silicon carbide nanowires have a very high aspect ratio and can be used for the fabrication of nanoelectronic devices, including electron gun emitters and MEMS probe tips, for use in a variety of displays and analyzers. Further provided is a filter comprising the nanowires. The filter is applied to systems for filtering vehicle engine exhaust gases to achieve improved filtering performance and increased lifetime.

    Abstract translation: 提供单晶碳化硅纳米线和制造纳米线的方法。 单晶碳化硅纳米线具有非常高的纵横比，可用于制造用于各种显示器和分析仪的纳米电子器件，包括电子枪发射器和MEMS探针尖端。 还提供了包含纳米线的过滤器。 该过滤器适用于过滤车辆发动机废气的系统，以实现改进的过滤性能和更长的使用寿命。

    Bit line pre-charge circuit of semiconductor memory device
    77.
    发明授权
    Bit line pre-charge circuit of semiconductor memory device 有权
    半导体存储器件的位线预充电电路

    公开(公告)号：US06909654B2

    公开(公告)日：2005-06-21

    申请号：US10633562

    申请日：2003-08-05

    Applicant: Jae-Hoon Joo ,  Jin-Seok Lee ,  Sang-Seok Kang ,  Kyu-Chan Lee ,  Byung-Heon Kwak ,  Byung-Chul Kim

    Inventor： Jae-Hoon Joo ,  Jin-Seok Lee ,  Sang-Seok Kang ,  Kyu-Chan Lee ,  Byung-Heon Kwak ,  Byung-Chul Kim

    IPC: H01L27/108 ,  G11C7/12 ,  G11C11/401 ,  G11C11/409 ,  H01L21/8242 ,  G11C7/00

    CPC classification number: G11C7/12 ,  G11C2207/2227

    Abstract: A bit line pre-charge circuit of a semiconductor memory device includes a pre-charge circuit connected between a pair of bit lines for pre-charging the pair of bit lines in response to a pre-charge control signal and a pre-charge voltage transmitting circuit for transmitting a pre-charge voltage to the pre-charge circuit in response to the pre-charge control signal. A voltage drop in a pre-charge voltage generation line may be prevented when a short circuit is formed between a word line and a pair of bit lines, and current consumption during a standby operation of the semiconductor memory device may also be reduced, by preventing current from flowing from the pair of bit lines to the pre-charge voltage generation line.

    Abstract translation: 半导体存储器件的位线预充电电路包括连接在一对位线之间的预充电电路，用于响应于预充电控制信号和预充电电压发射来对该对位线进行预充电 电路，用于响应于预充电控制信号将预充电电压发送到预充电电路。 当在字线和一对位线之间形成短路时，可以防止预充电电压产生线中的电压降，并且还可以通过防止在半导体存储器件的待机操作期间的电流消耗 电流从一对位线流向预充电电压产生线。

    Circuit for converting internal voltage of semiconductor device
    78.
    发明授权
    Circuit for converting internal voltage of semiconductor device 失效
    用于转换半导体器件内部电压的电路

    公开(公告)号：US5929696A

    公开(公告)日：1999-07-27

    申请号：US953052

    申请日：1997-10-17

    Applicant: Jong-Hyoung Lim ,  Jae-hoon Joo ,  Sang-seok Kang ,  Jin-seok Lee

    Inventor： Jong-Hyoung Lim ,  Jae-hoon Joo ,  Sang-seok Kang ,  Jin-seok Lee

    IPC: G11C11/413 ,  G05F1/46 ,  G11C11/401 ,  G11C11/407 ,  G11C29/06 ,  H01L27/10 ,  G05F1/10

    CPC classification number: G05F1/465

    Abstract: An internal voltage conversion circuit for a DRAM wherein a voltage level of an internal power supply is regulated by an external signal applied to the DRAM pins after packaging to perform reliability tests. The internal voltage conversion circuit includes a test mode signal generator, for generating a test mode signal by combining first control signals applied externally of the semiconductor device, and a switching signal generator, for generating first and second switching signals according to second control signals applied externally of the DRAM when the test mode signal is active. First and second switching resistor portions connected in series between the internal power supply port and a ground potential are switched by the first and second switching signals, respectively, so that their resistance values are changed. The resistor portions are in a feedback path connected to one input of a comparator. The other input is connected to a reference cell. The internal voltage supply varies responsive to changes in resistance values.

    Abstract translation: 一种用于DRAM的内部电压转换电路，其中内部电源的电压电平通过在封装之后施加到DRAM引脚的外部信号进行调节以执行可靠性测试。 内部电压转换电路包括测试模式信号发生器，用于通过组合在半导体器件外部施加的第一控制信号和开关信号发生器产生测试模式信号，用于根据外部施加的第二控制信号产生第一和第二开关信号 当测试模式信号有效时。 串联连接在内部电源端口和接地电位之间的第一和第二开关电阻部分分别通过第一和第二开关信号切换，使得它们的电阻值被改变。 电阻器部分处于连接到比较器的一个输入端的反馈路径中。 另一个输入连接到参考单元。 内部电压供应根据电阻值的变化而变化。

    Satellite communication receiving apparatus
    79.
    发明授权
    Satellite communication receiving apparatus 失效
    卫星通信接收装置

    公开(公告)号：US5550871A

    公开(公告)日：1996-08-27

    申请号：US362257

    申请日：1994-12-22

    Applicant: Jin-Seok Lee

    Inventor： Jin-Seok Lee

    IPC: H04B1/26 ,  H04L27/22 ,  H04L27/227 ,  H04L27/06

    CPC classification number: H04L27/2273

    Abstract: A satellite communication receiving apparatus capable of receiving a satellite communication broadcasting using an L-band and Phase Shift Keying(PSK) by sharing a temperature compensation voltage control oscillator with a voltage control oscillator used in Costas-loop and a local oscillator used in an intermediate frequency apparatus, thereby securing an effective satellite communication broadcasting receiving and facilitating a simplification thereof is disclosed. The present invention includes a modulator for generating an intermediate frequency using a satellite broadcasting signal obtained through an L-band receiving antenna, a low-noise amplifier a first band filter and a local oscillating frequency oscillated by an external base frequency; a Costas loop circuit for recovering an intermediate frequency obtained at the modulator using a base frequency shifted by 90.degree.; and sampling circuit for obtaining modulation data by sampling the signals at the Costas loop circuit.

    Abstract translation: 一种卫星通信接收装置，其能够通过在Costas-loop中使用的压控振荡器和在中间层中使用的本地振荡器共享温度补偿电压控制振荡器，使用L波段和相移键控（PSK）接收卫星通信广播 公开了一种有效的卫星通信广播接收和便于简化的方法。 本发明包括使用通过L波段接收天线获得的卫星广播信号，低噪声放大器，第一频带滤波器和由外部基频振荡的本地振荡频率来产生中频的调制器; 一种科斯塔斯环路电路，用于使用偏移90°的基频来恢复在调制器处获得的中频; 以及采样电路，用于通过对科斯塔斯环路电路上的信号进行采样来获得调制数据。

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