Abstract:
A computing system architecture is based upon a peer-to-peer, asynchronous model. The architecture specifies a set of infrastructure facilities that comprise an inter-prise operating system. The inter- prise operating system provides all the facilities that make application coding as easy in the peer-to-peer asynchronous model as it is in a hierarchical, synchronous model. Services, which reside in containers, are linked asynchronously by an inter-prise bus and use data from a virtual data store.
Abstract:
A method and circuit are provided for controlling access of two synchronous busses with asynchronous clocks to a synchronous single port Random Access Memory (RAM). In one preferred method, the clock of bus A is switched off via a control flip-flop and then the clock of bus B is switched on, allowing the control and data signals to pass through simple multiplexers. Bus B becomes the owner of the RAM. Later, the clock of bus B is switched off via the control flip-flop and then clock of bus A is switched on, such that bus A becomes owner of the bus. This allows any relative speed between the bus clocks.
Abstract:
Personal information of users is used to customize the browsing experiences of the users on a World-Wide-Web site. To ensure privacy of the users' personal information, each user is assigned a unique Universal Anonymous Identifier (UAI). The UAI is generated by a trusted third party and provided to the Web site operator. The Web site operator then indexes the users' personal information by UAI. Only the user has the ability to correlate his/her true identity with his/her personal information.
Abstract:
A keypad has keys (12) protruding through a housing (18) with at least one at-a-distance sensor (20) located approximately equidistant between each adjacent set of keys (12). Each key (12) has a tactile feedback element (32) located below and a primary graphic (10) displayed above. Graphics identifying additional functionality (14) are disposed off-center to primary graphic (10). Locator nubs (16) are located approximately equidistant between each adjacent set of keys (12).
Abstract:
A base station for a wireless communication system is capable of transmitting signals that match the polarization state of a mobile station by including an antenna arrangement having at least one set of transmit antenna elements and at least one set of receive antenna elements, a transformation mechanism having at least one antenna port coupled to the antenna arrangement and at least one beam port, and an adaptive measurement and control mechanism coupled to the transmit and receive antenna port signals and configured to measure and adaptively control attributes of the transmit and receive antenna port signals.
Abstract:
A proposed integrateable optical interleaver includes an input Y-branch coupler and at least two multi-section optical couplers. The multi-section optical couplers of the interleaver include at least three substantially similar optical couplers, adjacent ones of the optical couplers interconnected via at least one set of waveguides. The interleaver of the present invention comprises a highly compact and fabrication-robust form that is capable of being integrated onto a single planar lightwave circuit.
Abstract:
Improved compounds and base precursors that undergo thermal decomposition are disclosed. Thermal base precursors, and in particular, a novel class of salts of arylsulfonylacetic acids as bleaching agents or promoting for photothermographic use are disclosed. Compositions employing these thermal base precursors are suitable for use in acutance and antihalation systems, bleachable filter dye materials, and in promoting unblocking of various components such as blocked developers, especially in photothermographic elements.
Abstract:
A method and circuit are provided for controlling access of two synchronous busses with asynchronous clocks to a synchronous single port Random Access Memory (RAM). In one preferred method, the clock of bus A is switched off via a control flip-flop and then the clock of bus B is switched on, allowing the control and data signals to pass through simple multiplexers. Bus B becomes the owner of the RAM. Later, the clock of bus B is switched off via the control flip-flop and then clock of bus A is switched on, such that bus A becomes owner of the bus. This allows any relative speed between the bus clocks.
Abstract:
In a key pad key cap symbols are placed at the interstices between key caps as well as at their centers. The key pad electronics are designed to register simultaneously actuated key caps at an interstice as an input uniquely associated with the symbol locate at the interstice. The linear dimension of a row of key caps are approximately one-half that of a conventional key cap requiring approximately two key caps to form a linear dimension sizable enough to comfortably accommodate the tip of an adult finger. Additionally, the symbols located at the centers of key caps are elevated slightly, allowing unimpeded and ergonomic access to individual keys as well as the interstices.