公开(公告)号：US08847376B2

公开(公告)日：2014-09-30

申请号：US12842587

申请日：2010-07-23

Applicant: Vage Oganesian ,  Belgacem Haba ,  Craig Mitchell ,  Ilyas Mohammed ,  Piyush Savalia

Inventor： Vage Oganesian ,  Belgacem Haba ,  Craig Mitchell ,  Ilyas Mohammed ,  Piyush Savalia

IPC: H01L23/045

CPC classification number: H01L21/76819 ,  H01L21/76877 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/5389 ,  H01L24/18 ,  H01L24/19 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L24/97 ,  H01L25/105 ,  H01L25/117 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/24227 ,  H01L2224/24247 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/82 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01061 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/15165 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/15331 ,  H01L2924/157 ,  H01L2924/15788 ,  H01L2924/18161 ,  Y10T29/49002 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/83

Abstract: A microelectronic unit includes a carrier structure having a front surface, a rear surface remote from the front surface, and a recess having an opening at the front surface and an inner surface located below the front surface of the carrier structure. The microelectronic unit can include a microelectronic element having a bottom surface adjacent the inner surface, a top surface remote from the bottom surface, and a plurality of contacts at the top surface. The microelectronic element can include terminals electrically connected with the contacts of the microelectronic element. The microelectronic unit can include a dielectric region contacting at least the top surface of the microelectronic element. The dielectric region can have a planar surface located coplanar with or above the front surface of the carrier structure. The terminals can be exposed at the surface of the dielectric region for interconnection with an external element.

Abstract translation: 微电子单元包括具有前表面，远离前表面的后表面和在前表面具有开口的凹部和位于载体结构的前表面下方的内表面的载体结构。 微电子单元可以包括具有邻近内表面的底表面，远离底表面的顶表面和在顶表面处的多个触点的微电子元件。 微电子元件可以包括与微电子元件的触点电连接的端子。 微电子单元可以包括至少与微电子元件的顶表面接触的电介质区域。 电介质区域可以具有与载体结构的前表面共面或平行的平面。 端子可以暴露在电介质区域的表面以与外部元件互连。

公开(公告)号：US08686565B2

公开(公告)日：2014-04-01

申请号：US12883431

申请日：2010-09-16

Applicant: Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

IPC: H01L23/48 ,  H01L21/50

CPC classification number: H01L25/0657 ,  H01L21/76805 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/24 ,  H01L24/32 ,  H01L24/82 ,  H01L24/92 ,  H01L25/50 ,  H01L27/14601 ,  H01L27/14632 ,  H01L2224/0346 ,  H01L2224/05009 ,  H01L2224/05647 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/82005 ,  H01L2224/82101 ,  H01L2224/9202 ,  H01L2224/92144 ,  H01L2224/94 ,  H01L2225/06544 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2224/82 ,  H01L2924/00

Abstract: An assembly and method of making same are provided. The assembly can be formed by stacking a first semiconductor element atop a second semiconductor element and forming an electrically conductive element extending through openings of the semiconductor elements. The openings may be staged. The conductive element can conform to contours of the interior surfaces of the openings and can electrically connect conductive pads of the semiconductor elements. A dielectric region can be provided at least substantially filling the openings of the semiconductor elements, and the electrically conductive element can extend through an opening formed in the dielectric region.

Abstract translation: 提供了组装和制造方法。 可以通过在第二半导体元件顶部堆叠第一半导体元件并形成延伸穿过半导体元件的开口的导电元件来形成该组件。 开口可以分段。 导电元件可以符合开口的内表面的轮廓并且可以电连接半导体元件的导电焊盘。 可以提供至少基本上填充半导体元件的开口的电介质区域，并且导电元件可以延伸穿过形成在电介质区域中的开口。

公开(公告)号：US20140008669A1

公开(公告)日：2014-01-09

申请号：US13543697

申请日：2012-07-06

Applicant: Ilyas Mohammed ,  Liang Wang ,  Steven D. Gottke

Inventor： Ilyas Mohammed ,  Liang Wang ,  Steven D. Gottke

IPC: H01L27/15 ,  H01L33/60

CPC classification number: H01L33/60 ,  F21K9/23 ,  F21Y2115/10 ,  H01L25/0753 ,  H01L27/156 ,  H01L33/62 ,  H01L2224/48463 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/19107 ,  H01L2933/0066

Abstract: Parallel plate slot emission array. In accordance with an embodiment of the present invention, an article of manufacture includes a side-emitting light emitting diode configured to emit light from more than two surfaces. The article of manufacture includes a first sheet electrically and thermally coupled to a first side of the light emitting diode, and a second sheet electrically and thermally coupled to a second side of the light emitting diode. The article of manufacture further includes a plurality of reflective surfaces configured to reflect light from all of the surfaces of the light emitting diode through holes in the first sheet. The light may be reflected via total internal reflection.

Abstract translation: 平行板槽发射阵列。 根据本发明的实施例，制品包括被配置为从多于两个表面发射光的侧面发光发光二极管。 该制品包括电和热耦合到发光二极管的第一侧的第一片，以及电耦合到发光二极管的第二侧的第二片。 制品还包括多个反射表面，其被配置为通过第一片材中的孔反射来自发光二极管的所有表面的光。 光可以通过全内反射来反射。

公开(公告)号：US08618659B2

公开(公告)日：2013-12-31

申请号：US13462158

申请日：2012-05-02

Applicant: Hiroaki Sato ,  Teck-Gyu Kang ,  Belgacem Haba ,  Philip R. Osborn ,  Wei-Shun Wang ,  Ellis Chau ,  Ilyas Mohammed ,  Norihito Masuda ,  Kazuo Sakuma ,  Kiyoaki Hashimoto ,  Kurosawa Inetaro ,  Tomoyuki Kikuchi

Inventor： Hiroaki Sato ,  Teck-Gyu Kang ,  Belgacem Haba ,  Philip R. Osborn ,  Wei-Shun Wang ,  Ellis Chau ,  Ilyas Mohammed ,  Norihito Masuda ,  Kazuo Sakuma ,  Kiyoaki Hashimoto ,  Kurosawa Inetaro ,  Tomoyuki Kikuchi

IPC: H01L23/48

CPC classification number: H01L21/4885 ,  H01L21/565 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49517 ,  H01L23/49811 ,  H01L23/5389 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00013 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A microelectronic assembly includes a substrate having a first surface and a second surface remote from the first surface. A microelectronic element overlies the first surface and first electrically conductive elements are exposed at one of the first surface and the second surface. Some of the first conductive elements are electrically connected to the microelectronic element. Wire bonds have bases joined to the conductive elements and end surfaces remote from the substrate and the bases, each wire bond defining an edge surface extending between the base and the end surface. An encapsulation layer extends from the first surface and fills spaces between the wire bonds such that the wire bonds are separated by the encapsulation layer. Unencapsulated portions of the wire bonds are defined by at least portions of the end surfaces of the wire bonds that are uncovered by the encapsulation layer.

Abstract translation: 微电子组件包括具有第一表面和远离第一表面的第二表面的衬底。 微电子元件覆盖在第一表面上，并且第一导电元件暴露在第一表面和第二表面中的一个处。 一些第一导电元件电连接到微电子元件。 线接合具有连接到远离基板和基座的导电元件和端表面的基部，每个引线接合限定在基部和端表面之间延伸的边缘表面。 封装层从第一表面延伸并填充引线键合之间的空间，使得引线键合被封装层分离。 引线键合的未封装的部分由未被封装层覆盖的引线接合端表面的至少部分限定。

公开(公告)号：US08525338B2

公开(公告)日：2013-09-03

申请号：US13154778

申请日：2011-06-07

Applicant: Hiroaki Sato ,  Kiyoaki Hashimoto ,  Yoshikuni Nakadaira ,  Norihito Masuda ,  Belgacem Haba ,  Ilyas Mohammed ,  Philip Damberg

Inventor： Hiroaki Sato ,  Kiyoaki Hashimoto ,  Yoshikuni Nakadaira ,  Norihito Masuda ,  Belgacem Haba ,  Ilyas Mohammed ,  Philip Damberg

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/00

CPC classification number: H01L23/13 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/4951 ,  H01L23/49517 ,  H01L23/49816 ,  H01L24/24 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A microelectronic package and method of making same are provided. The package includes a substrate having first and second opposed surfaces, an edge surface extending therebetween, a plurality of terminals, and a plurality of conductive elements electrically connected with the terminals. The edge surface can be disposed at a periphery of the substrate or can be the edge surface of an aperture within the substrate. A microelectronic element has a front face and contacts thereon, with at least some of the contacts being adjacent to the edge surface of the substrate. A dielectric material overlies the edge surface of the substrate and defines a sloping surface between the front face of the microelectronic element and the substrate. A conductive matrix material defines a plurality of conductive interconnects extending along the sloping surface. The conductive interconnects electrically interconnect respective ones of the contacts with the conductive elements.

Abstract translation: 提供微电子封装及其制造方法。 封装包括具有第一和第二相对表面的基板，在其间延伸的边缘表面，多个端子以及与端子电连接的多个导电元件。 边缘表面可以设置在基底的周边，或者可以是基底内的孔的边缘表面。 微电子元件具有正面并在其上接触，其中至少一些触点与衬底的边缘表面相邻。 电介质材料覆盖在衬底的边缘表面上，并且在微电子元件的前表面和衬底之间限定一倾斜表面。 导电基体材料限定沿着倾斜表面延伸的多个导电互连。 导电互连将导电元件的各个触点电连接。

公开(公告)号：US08487421B2

公开(公告)日：2013-07-16

申请号：US13195187

申请日：2011-08-01

Applicant: Hiroaki Sato ,  Norihito Masuda ,  Belgacem Haba ,  Ilyas Mohammed

Inventor： Hiroaki Sato ,  Norihito Masuda ,  Belgacem Haba ,  Ilyas Mohammed

IPC: H01L23/02

CPC classification number: H01L23/28 ,  H01L21/56 ,  H01L23/3185 ,  H01L23/48 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L24/24 ,  H01L24/25 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/02371 ,  H01L2224/02375 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/12105 ,  H01L2224/13021 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/14181 ,  H01L2224/24011 ,  H01L2224/24105 ,  H01L2224/24146 ,  H01L2224/24226 ,  H01L2224/245 ,  H01L2224/25171 ,  H01L2224/2518 ,  H01L2224/29099 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48145 ,  H01L2224/73209 ,  H01L2224/73253 ,  H01L2224/73267 ,  H01L2224/8203 ,  H01L2224/82101 ,  H01L2224/82104 ,  H01L2224/82105 ,  H01L2224/82947 ,  H01L2224/92244 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/06524 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1052 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19107 ,  H01L2924/01029 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01079 ,  H01L2924/00012 ,  H01L2224/82 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00

Abstract: A microelectronic package may include a stacked microelectronic unit including at least first and second vertically stacked microelectronic elements each having a front face facing a top surface of the package. The front face of the first element may be adjacent the top surface, and the first element may overlie the front face of the second element such that at least a portion of the front face of the second element having an element contact thereon extends beyond an edge of the first element. A conductive structure may electrically connect a first terminal at the top surface to an element contact at the front face of the second element, and include a continuous monolithic metal feature extending along the top surface and through at least a portion of an encapsulant, which is between the top surface and the front face of the second element, towards the element contact.

Abstract translation: 微电子封装可以包括堆叠的微电子单元，其包括至少第一和第二垂直堆叠的微电子元件，每个微电子元件具有面向封装的顶表面的正面。 第一元件的前表面可以与顶表面相邻，并且第一元件可以覆盖在第二元件的前表面上，使得具有元件接触的第二元件的前表面的至少一部分延伸超过边缘 的第一个元素。 导电结构可以将顶表面处的第一端子与第二元件的前表面处的元件接触电连接，并且包括沿着顶表面延伸并通过至少一部分密封剂的连续整体金属特征， 在第二元件的顶表面和前表面之间，朝向元件接触。

公开(公告)号：US08486758B2

公开(公告)日：2013-07-16

申请号：US13076969

申请日：2011-03-31

Applicant: Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

IPC: H01L21/00 ,  H01L23/48

CPC classification number: H01L25/00 ,  H01L23/481 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05023 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05186 ,  H01L2224/0519 ,  H01L2224/05568 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/0603 ,  H01L2224/0613 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/06505 ,  H01L2224/116 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/136 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/276 ,  H01L2224/29023 ,  H01L2224/29082 ,  H01L2224/291 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/32148 ,  H01L2224/32238 ,  H01L2224/73103 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/8123 ,  H01L2224/81815 ,  H01L2224/8183 ,  H01L2224/83191 ,  H01L2224/83193 ,  H01L2224/8323 ,  H01L2224/83815 ,  H01L2224/8383 ,  H01L2224/9202 ,  H01L2224/9221 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01029 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/35 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/05552 ,  H01L2924/00012 ,  H01L2924/00

Abstract: Disclosed are a microelectronic assembly of two elements and a method of forming same. A microelectronic element includes a major surface, and a dielectric layer and at least one bond pad exposed at the major surface. The microelectronic element may contain a plurality of active circuit elements. A first metal layer is deposited overlying the at least one bond pad and the dielectric layer. A second element having a second metal layer deposited thereon is provided, and the first metal layer is joined with the second metal layer. The assembly may be severed along dicing lanes into individual units each including a chip.

Abstract translation: 公开了两种元件的微电子组件及其形成方法。 微电子元件包括主表面和介电层以及在主表面处暴露的至少一个接合焊盘。 微电子元件可以包含多个有源电路元件。 沉积第一金属层，覆盖至少一个接合焊盘和电介质层。 提供了具有沉积在其上的第二金属层的第二元件，并且第一金属层与第二金属层接合。 组件可以沿着切割通道切割成各自包括芯片的单元。

公开(公告)号：US20130127364A1

公开(公告)日：2013-05-23

申请号：US13299672

申请日：2011-11-18

Applicant: Ilyas Mohammed ,  Masud Beroz ,  Liang Wang

Inventor： Ilyas Mohammed ,  Masud Beroz ,  Liang Wang

IPC: H05B37/02 ,  H01L33/62 ,  H01L33/38 ,  H01L21/78

CPC classification number: H01L25/162 ,  F21K9/23 ,  F21Y2115/10 ,  H01L21/6835 ,  H01L21/78 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/97 ,  H01L25/167 ,  H01L33/0079 ,  H01L33/62 ,  H01L33/644 ,  H01L2221/6835 ,  H01L2224/05567 ,  H01L2224/05686 ,  H01L2224/06102 ,  H01L2224/24105 ,  H01L2224/24226 ,  H01L2224/29186 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/83896 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1461 ,  Y02B20/42 ,  H01L2924/01031 ,  H01L2924/0503 ,  H01L2924/053 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/05552

Abstract: Front facing piggyback wafer assembly. In accordance with an embodiment of the present invention, a plurality of piggyback substrates are attached to a carrier wafer. The plurality of piggyback substrates are dissimilar in composition to the carrier wafer. The plurality of piggyback substrates are processed, while attached to the carrier wafer, to produce a plurality of integrated circuit devices. The plurality of integrated circuit devices are singulated to form individual integrated circuit devices. The carrier wafer may be processed to form integrated circuit structures prior to the attaching.

公开(公告)号：US20130119520A1

公开(公告)日：2013-05-16

申请号：US13294226

申请日：2011-11-11

Applicant: Ilyas Mohammed

Inventor： Ilyas Mohammed

IPC: H01L23/58 ,  H01L21/78

CPC classification number: H01L21/78 ,  H01L23/3107 ,  H01L23/562 ,  H01L23/585 ,  H01L29/0657 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A microelectronic element is disclosed that includes a semiconductor chip and a continuous monolithic metallic edge-reinforcement ring that covers each of the plurality of edge surfaces of the semiconductor chip and extending onto the front surface. The semiconductor chip may have front and rear opposed surfaces and a plurality of contacts at the front surface and edge surfaces extending between the front and rear surfaces. The semiconductor chip may also embody at least an active device or a passive device.

Abstract translation: 公开了一种微电子元件，其包括覆盖半导体芯片的多个边缘表面中的每一个并延伸到前表面上的半导体芯片和连续的单片金属边缘加强环。 半导体芯片可以具有前表面和后相对表面以及在前表面和在前表面和后表面之间延伸的边缘表面的多个触点。 半导体芯片还可以具有至少一个有源器件或无源器件。

公开(公告)号：US20130099387A1

公开(公告)日：2013-04-25

申请号：US13277330

申请日：2011-10-20

Applicant: Terrence Caskey ,  Ilyas Mohammed

Inventor： Terrence Caskey ,  Ilyas Mohammed

IPC: H01L23/522 ,  H01L21/66

CPC classification number: H01L25/18 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/76802 ,  H01L21/76877 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3185 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/96 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/117 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/05554 ,  H01L2224/05571 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/06155 ,  H01L2224/12105 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/14131 ,  H01L2224/27334 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48108 ,  H01L2224/48145 ,  H01L2224/4824 ,  H01L2224/73207 ,  H01L2224/73215 ,  H01L2224/73217 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/82031 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/83005 ,  H01L2224/83192 ,  H01L2224/852 ,  H01L2224/92144 ,  H01L2224/92147 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/06596 ,  H01L2225/1035 ,  H01L2225/1052 ,  H01L2225/1076 ,  H01L2225/1082 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/12042 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/18162 ,  H01L2924/186 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/05552

Abstract: A microelectronic package may include a first microelectronic unit including a semiconductor chip having first chip contacts, an encapsulant contacting an edge of the semiconductor chip, and first unit contacts exposed at a surface of the encapsulant and electrically connected with the first chip contacts. The package may include a second microelectronic unit including a semiconductor chip having second chip contacts at a surface thereof, and an encapsulant contacting an edge of the chip of the second unit and having a surface extending away from the edge. The surfaces of the chip and the encapsulant of the second unit define a face of the second unit. Package terminals at the face may be electrically connected with the first unit contacts through bond wires electrically connected with the first unit contacts, and the second chip contacts through metallized vias and traces formed in contact with the second chip contacts.

Abstract translation: 微电子封装可以包括第一微电子单元，其包括具有第一芯片触点的半导体芯片，与半导体芯片的边缘接触的密封剂以及暴露在密封剂的表面处并与第一芯片触点电连接的第一单元触点。 封装可以包括第二微电子单元，其包括在其表面具有第二芯片触点的半导体芯片，以及与第二单元的芯片的边缘接触并且具有远离边缘延伸的表面的密封剂。 芯片的表面和第二单元的密封剂的表面限定了第二单元的面。 表面处的封装端子可以通过与第一单元触点电连接的接合线与第一单元触点电连接，并且第二芯片通过金属化通孔和与第二芯片触点接触形成的迹线接触。