公开(公告)号：US20020006679A1

公开(公告)日：2002-01-17

申请号：US09944231

申请日：2001-08-30

Inventor： Ammar Derraa

IPC: H01L021/00 ,  H01J009/00

CPC classification number: H01J9/025 ,  H01J3/022 ,  H01J2329/00

Abstract: A method for fabricating row lines over a field emission array employs only two mask steps to define row lines and pixel openings. A layer of conductive material is disposed over a substantially planarized surface of a grid of semiconductive material and a layer of passivation material is disposed over the layer of conductive material. Row lines and pixel openings may be formed through the passivation and conductive layers by use of a first mask. The row lines may be further defined by using a second mask to remove semiconductive material of the grid. Alternatively, a first mask may be used to fully define row lines from the layers of passivation, conductive, and semiconductive material, while a second mask may be used to define pixel openings through the layers of passivation and conductive material. Field emission arrays fabricated by such methods are also disclosed.

Abstract translation: 用于在场致发射阵列上制造行线的方法仅使用两个掩模步骤来限定行线和像素开口。 导电材料层设置在半导体材料栅格的基本上平坦化的表面上，并且钝化材料层设置在导电材料层上。 可以通过使用第一掩模通过钝化层和导电层形成行线和像素开口。 可以通过使用第二掩模来进一步限定行线以去除网格的半导体材料。 或者，可以使用第一掩模来完全限定来自钝化层，导电层和半导体材料层的行线，而第二掩模可用于限定通过钝化层和导电材料层的像素开口。 还公开了通过这种方法制造的场致发射阵列。

公开(公告)号：US06326725B1

公开(公告)日：2001-12-04

申请号：US09085333

申请日：1998-05-26

Applicant: Zhongyi Xia

Inventor： Zhongyi Xia

IPC: H01J130

CPC classification number: H01J3/022

Abstract: A display includes a substrate and an emitter formed on the substrate. A first dielectric layer is formed on the substrate to have a thickness slightly less than a height of the emitter above the planar surface and includes an opening formed about the emitter. The display also includes a conductive extraction grid formed on the first dielectric layer. The extraction grid includes an opening surrounding the emitter. The display further includes a second dielectric layer formed on the extraction grid and a focusing electrode formed on the second dielectric layer. The focusing electrode is electrically coupled to the emitter through an impedance element. The focusing electrode includes an opening formed above the apex. The focusing electrode provides enhanced focusing performance together with reduced circuit complexity, resulting in a superior display.

Abstract translation: 显示器包括形成在基板上的基板和发射极。 第一电介质层形成在衬底上，具有比平坦表面上方的发射极的高度略小的厚度，并且包括围绕发射极形成的开口。 显示器还包括形成在第一介电层上的导电提取栅格。 提取格栅包括围绕发射器的开口。 显示器还包括形成在提取栅格上的第二介电层和形成在第二介电层上的聚焦电极。 聚焦电极通过阻抗元件电耦合到发射极。 聚焦电极包括形成在顶点上方的开口。 聚焦电极提供增强的聚焦性能以及降低的电路复杂度，导致优异的显示。

公开(公告)号：US06291941B1

公开(公告)日：2001-09-18

申请号：US09261589

申请日：1999-03-03

Applicant: David A. Zimlich ,  Thomas W. Voshell ,  David A. Cathey, Jr.

Inventor： David A. Zimlich ,  Thomas W. Voshell ,  David A. Cathey, Jr.

IPC: G09G310

CPC classification number: H01J3/022 ,  G09G3/22 ,  G09G2300/08 ,  G09G2330/026 ,  H01J2329/00

Abstract: A method and a control circuit for controlling a field emission display to reduce emission to grid during turn on and turn off are provided. In an illustrative embodiment, the control circuit includes a threshold detector that receives an input signal proportional to an anode voltage (VAnode) for the display and produces a high or low output signal dependent on the level of VAnode. An output low corresponding to a high voltage at the display screen enables a gate element of a pass transistor that controls current flow to the grid. Alternately, an output high corresponding to a low voltage at the display screen enables a pull down transistor that controls discharge of the grid to ground. The control circuit can also include a fault detection circuit for detecting a sharp decrease in the anode voltage and discharging the grid. In an alternate embodiment, the control circuit shorts the emitter sites together during turn on and turn off and provides a high source impedance to restrict current flow to any one emitter site. The high source impedance can be permanent or switchable by a relay or switching circuit.

Abstract translation: 提供一种用于控制场致发射显示以在打开和关闭期间减少到格栅的发射的方法和控制电路。 在说明性实施例中，控制电路包括阈值检测器，其接收与用于显示器的阳极电压（VAnode）成比例的输入信号，并且根据VAnode的电平产生高或低输出信号。 与显示屏幕上的高电压相对应的输出低电平使得能够控制电流流向电网的通过晶体管的栅极元件。 或者，对应于显示屏幕处的低电压的输出高电平使得能够控制电网到地的放电的下拉晶体管。 控制电路还可以包括用于检测阳极电压急剧下降并排出电网的故障检测电路。 在替代实施例中，控制电路在导通和断开期间将发射极点一起短路，并提供高的源阻抗以限制电流流向任何一个发射器位置。 高源阻抗可以由继电器或开关电路永久或切换。

公开(公告)号：US20010015615A1

公开(公告)日：2001-08-23

申请号：US09847158

申请日：2001-05-01

Inventor： Zhongyi Xia

IPC: H01J001/62 ,  H01J063/04

CPC classification number: H01J3/022

Abstract: A display includes a substrate and an emitter formed on the substrate. A first dielectric layer is formed on the substrate to have a thickness slightly less than a height of the emitter above the planar surface and includes an opening formed about the emitter. The display also includes a conductive extraction grid formed on the first dielectric layer. The extraction grid includes an opening surrounding the emitter. The display further includes a second dielectric layer formed on the extraction grid and a focusing electrode formed on the second dielectric layer. The focusing electrode is electrically coupled to the emitter through an impedance element. The focusing electrode includes an opening formed above the apex. The focusing electrode provides enhanced focusing performance together with reduced circuit complexity, resulting in a superior display.

公开(公告)号：US06278228B1

公开(公告)日：2001-08-21

申请号：US09357851

申请日：1999-07-21

Applicant: Yuichi Iwase ,  Masami Okita

Inventor： Yuichi Iwase ,  Masami Okita

IPC: H01J1304

CPC classification number: H01J3/022 ,  H01J29/467 ,  H01J2201/30423 ,  H01J2329/00

Abstract: A cold cathode field emission device having an electron emission layer (14), an insulating layer and a gate electrode (12) which are laminated one on another with the insulating layer positioned between the gate electrode, and the electron emission layer (14), and further having an opening portion which penetrates through at least the insulating layer and the electron emission layer, the electron emission layer having an edge portion for emitting electrons, the edge portion being projected on a wall surface of the opening portion, and the electron emission layer being connected to a power source through a resistance layer (23).

Abstract translation: 一种具有电子发射层（14），绝缘层和栅电极（12）的冷阴极场致发射器件，其中绝缘层位于栅电极和电子发射层之间， 并且还具有穿透至少绝缘层和电子发射层的开口部分，所述电子发射层具有用于发射电子的边缘部分，所述边缘部分突出在所述开口部分的壁表面上，并且所述电子发射 层通过电阻层（23）连接到电源。

公开(公告)号：US06236149B1

公开(公告)日：2001-05-22

申请号：US09126939

申请日：1998-07-30

Applicant: J. Brett Rolfson

Inventor： J. Brett Rolfson

IPC: H01J1304

CPC classification number: H01J3/022 ,  H01J2329/00

Abstract: The present invention includes field emission devices and methods of forming field emission devices. According to one aspect of the invention, a field emission device includes a substrate; at least two adjacent and spaced emitters extending from the substrate; a conductor spaced from the substrate and configured to receive an electrical charge to control the emission of electrons from the at least two adjacent and spaced emitters; and a plurality of spaced insulative conductor supports positioned between the conductor and the substrate, and intermediate the at least two adjacent and spaced emitters.

Abstract translation: 本发明包括场致发射器件和形成场致发射器件的方法。 根据本发明的一个方面，一种场致发射器件包括衬底; 至少两个相邻和间隔的发射器从衬底延伸; 与衬底间隔开并被配置为接收电荷以控制来自至少两个相邻和间隔的发射器的电子的发射; 以及定位在所述导体和所述基板之间的多个隔开的绝缘导体支撑件，并且在所述至少两个相邻和间隔的发射器之间。

公开(公告)号：US06229258B1

公开(公告)日：2001-05-08

申请号：US09653770

申请日：2000-09-01

Applicant: Zhongyi Xia

Inventor： Zhongyi Xia

IPC: H01J2900

CPC classification number: H01J3/022

Abstract: A display includes a substrate and an emitter formed on the substrate. A first dielectric layer is formed on the substrate to have a thickness slightly less than a height of the emitter above the planar surface and includes an opening formed about the emitter. The display also includes a conductive extraction grid formed on the first dielectric layer. The extraction grid includes an opening surrounding the emitter. The display further includes a second dielectric layer formed on the extraction grid and a focusing electrode formed on the second dielectric layer. The focusing electrode is electrically coupled to the emitter through an impedance element. The focusing electrode includes an opening formed above the apex. The focusing electrode provides enhanced focusing performance together with reduced circuit complexity, resulting in a superior display.

公开(公告)号：US06204596B1

公开(公告)日：2001-03-20

申请号：US09107392

申请日：1998-06-30

Applicant: John M. Macaulay ,  Peter C. Searson ,  Robert M. Duboc, Jr. ,  Christopher J. Spindt

Inventor： John M. Macaulay ,  Peter C. Searson ,  Robert M. Duboc, Jr. ,  Christopher J. Spindt

IPC: H01J102

CPC classification number: B82Y10/00 ,  H01J1/3042 ,  H01J3/022 ,  H01J9/025 ,  H01J2201/30403 ,  H01J2201/30457 ,  H01J2201/319 ,  Y10T428/2973 ,  Y10T428/298

Abstract: An electron-emitting device contains a lower conductive region (22), a porous insulating layer (24A, 24B, 24D, 24E, or 24F) overlying the lower conductive region, and a multiplicity of electron-emissive elements (30, 30A, or 30B) situated in pores (281) extending through the porous layer. The pores are situated at locations substantially random relative to one another. The lower conductive region typically contains a highly conductive portion (22A) and an overlying highly resistive portion (22B). Alternatively or additionally, a patterned gate layer (34B, 40B, or 46B) overlies the porous layer. Openings (36, 42, or 541) corresponding to the filaments extend through the gate layer at locations generally centered on the filaments such that the filaments are separated from the gate layer.

Abstract translation: 电子发射器件包含覆盖在下导电区域上的下导电区域（22），多孔绝缘层（24A，24B，24D，24E或24F）和多个电子发射元件（30,30A或 30B）位于延伸穿过多孔层的孔（281）中。 孔位于相对于彼此基本上随机的位置。 下导电区域通常包含高导电部分（22A）和覆盖的高电阻部分（22B）。 或者或另外，图案化的栅极层（34B，40B或46B）覆盖在多孔层上。 对应于长丝的开口（36,42或541）在通常以灯丝为中心的位置处延伸穿过栅极层，使得灯丝与栅极层分离。

公开(公告)号：US6147456A

公开(公告)日：2000-11-14

申请号：US311108

申请日：1999-05-13

Applicant: John L. Janning

Inventor： John L. Janning

IPC: H01J3/02 ,  H01J29/02 ,  H01J29/06 ,  H01J29/08 ,  H01J29/46 ,  H01J31/12 ,  H01J1/02

CPC classification number: H01J29/085 ,  H01J29/023 ,  H01J29/06 ,  H01J29/467 ,  H01J3/022 ,  H01J31/123 ,  H01J31/127 ,  H01J2201/32

Abstract: Cathodoluminescent field emission display devices feature phosphor biasing, amplification material layers for secondary electron emissions, oxide secondary emission enhancement layers, and ion barrier layers of silicon nitride, to provide high-efficiency, high-brightness field emission displays with improved operating characteristics and durability. The amplification materials include copper-barium, copper-beryllium, gold-barium, gold-calcium, silver-magnesium and tungsten-barium-gold, and other high amplification factor materials fashioned to produce high-level secondary electron emissions within a field emission display device. For enhanced secondary electron emissions, an amplification material layer can be coated with a near mono-molecular film consisting essentially of an oxide of barium, beryllium, calcium, magnesium or strontium. Use of a high amplification factor film as a phosphor biasing electrode, and variability of the phosphor biasing potential to achieve brightness or gray scale control are further described in the disclosure.

Abstract translation: 阴极发光场致发射显示装置具有荧光偏置，用于二次电子发射的放大材料层，氧化物二次发射增强层和氮化硅的离子阻挡层，以提供具有改进的操作特性和耐久性的高效率，高亮度场致发射显示器。 扩增材料包括铜 - 钡，铜 - 铍，金 - 钡，金 - 钙，银 - 镁和钨 - 钡 - 金，以及其他高放大因子材料，用于在场发射显示器内产生高级二次电子发射 设备。 对于增强的二次电子发射，可以用基本上由钡，铍，钙，镁或锶的氧化物组成的近单分子膜涂覆扩增材料层。 在本公开中进一步描述了使用高放大因子膜作为荧光体偏置电极，以及荧光体偏置电位的变化以实现亮度或灰度级控制。

公开(公告)号：US6137214A

公开(公告)日：2000-10-24

申请号：US431015

申请日：1999-11-01

Applicant: Kanwal K. Raina

Inventor： Kanwal K. Raina

IPC: H01J3/02 ,  H01J9/02 ,  H01J31/12 ,  H01J1/02

CPC classification number: H01J3/022 ,  H01J31/127 ,  H01J9/025

Abstract: A field emission device having a gate electrode structure in which a nanocrystalline or microcrystalline silicon layer is positioned over a silicon dioxide dielectric layer. Also disclosed are methods for forming the field emission device. The nanocrystalline or microcrystalline silicon layer forms a bond with the dielectric layer that is sufficiently strong to prevent delamination during a chemical-mechanical planarization operation that is conducted during formation of the field emission device. The nanocrystalline or microcrystalline silicon layer is deposited by PECVD in an atmosphere that contains silane and hydrogen at a ratio in a range from about 1:15 to about 1:40. Multiple field emission devices may be formed and included in a flat panel display for computer monitors, telecommunications devices, and the like.

Abstract translation: 一种场致发射器件，具有其中纳米晶体或微晶硅层位于二氧化硅电介质层上方的栅电极结构。 还公开了形成场发射装置的方法。 纳米晶体或微晶硅层与电介质层形成结合，其足够强以防止在形成场致发射器件期间进行的化学 - 机械平面化操作期间的分层。 纳米晶体或微晶硅层通过PECVD在含有硅烷和氢气的气氛中以约1:15至约1:40的比例沉积。 可以形成多个场致发射器件并将其包括在用于计算机监视器，电信设备等的平板显示器中。