Control valve
    82.
    发明授权
    Control valve 失效
    控制阀

    公开(公告)号:US4666126A

    公开(公告)日:1987-05-19

    申请号:US817255

    申请日:1986-01-08

    CPC classification number: F16K31/025 F16K1/34 F16K39/02

    Abstract: A control valve in which a surface of a valve seat closer to a valve body is formed so as to be flat. A valve head corresponding to an annularly formed fluid-communication passage is provided with an annular inner convex projection and an annular outer convex projection. These projections engage with the flat surface of the valve seat on the inner side and the outer side of the fluid-communicating passage, respectively. The valve head is provided with a communicating passage for providing communication between a valve body-driving portion side thereof and a valve seat surface side containing the inner convex projection.

    Abstract translation: 一种控制阀,其中阀座的靠近阀体的表面形成为平坦的。 对应于环形流体连通通道的阀头设置有环形内凸起凸起和环形外凸起凸起。 这些突起分别与流体连通通道的内侧和外侧上的阀座的平坦表面接合。 阀头设置有用于在其阀体驱动部分侧和包含内凸起凸起的阀座表面侧之间提供连通的连通通道。

    Flash backed DRAM module storing parameter information of the DRAM module in the flash
    83.
    发明授权
    Flash backed DRAM module storing parameter information of the DRAM module in the flash 有权
    闪存支持的DRAM模块在闪存中存储DRAM模块的参数信息

    公开(公告)号:US08977831B2

    公开(公告)日:2015-03-10

    申请号:US12369046

    申请日:2009-02-11

    Abstract: A device includes volatile memory; one or more non-volatile memory chips, each of which is for storing data moved from the volatile-memory; an interface for connecting to a backup power source arranged to temporarily power the volatile memory upon a loss of power from a primary power source; a controller in communication with the volatile memory and the non-volatile memory, wherein: the controller is programmed to move data from the volatile memory to the non-volatile memory chips upon a loss of power of the primary power source of the volatile memory; and parameters describing the volatile memory are stored in at least one of the non-volatile memory chips that store the data moved from the volatile memory. In some aspects the parameters include serial presence detect information.

    Abstract translation: 一个设备包括易失性存储器; 一个或多个非易失性存储器芯片,每个非易失性存储器芯片用于存储从易失性存储器移动的数据; 用于连接到备用电源的接口,其布置成在来自主电源的电力丢失时临时对所述易失性存储器供电; 与易失性存储器和非易失性存储器通信的控制器,其中:控制器被编程为在易失性存储器的主电源的功率损失时将数据从易失性存储器移动到非易失性存储器芯片; 并且描述易失性存储器的参数存储在存储从易失性存储器移动的数据的至少一个非易失性存储器芯片中。 在某些方面,参数包括串行存在检测信息。

    Method and system for hash key memory footprint reduction
    84.
    发明授权
    Method and system for hash key memory footprint reduction 有权
    哈希密钥存储器占用空间减少的方法和系统

    公开(公告)号:US08806174B2

    公开(公告)日:2014-08-12

    申请号:US13677791

    申请日:2012-11-15

    Applicant: Stec, Inc.

    Abstract: A system and method are disclosed for storing data in a hash table. The method includes receiving data, determining a location identifier for the data wherein the location identifier identifies a location in the hash table for storing the data and the location identifier is derived from the data, compressing the data by extracting the location identifier; and storing the compressed data in the identified location of the hash table.

    Abstract translation: 公开了用于将数据存储在散列表中的系统和方法。 该方法包括接收数据,确定数据的位置标识符,其中位置标识符标识哈希表中用于存储数据的位置,并从数据中导出位置标识符,通过提取位置标识符来压缩数据; 以及将所述压缩数据存储在所述散列表的所识别位置。

    Apparatus and method for determining a read level of a memory cell based on cycle information
    85.
    发明授权
    Apparatus and method for determining a read level of a memory cell based on cycle information 有权
    用于基于周期信息确定存储器单元的读取电平的装置和方法

    公开(公告)号:US08737136B2

    公开(公告)日:2014-05-27

    申请号:US13076340

    申请日:2011-03-30

    Inventor: Aldo G. Cometti

    CPC classification number: G11C16/26 G11C11/5628 G11C11/5642 G11C16/10

    Abstract: Disclosed is an apparatus and method for determining a read level voltage to apply to a block of memory cells in a non-volatile memory circuit. A prediction value is compared to a prediction indicator to determine whether a new read level voltage to be applied to read the memory cells should be estimated. If a new read level should be estimated the new read level is calculated as a function of an initial read level and a dwell time and a number of program/erase cycles. A controller provides one or more programming commands representative of the new read level voltage to the memory circuit to read the cells.

    Abstract translation: 公开了一种用于确定读取电平电压以应用于非易失性存储器电路中的存储器单元块的装置和方法。 将预测值与预测指标进行比较,以确定是否应该估计要应用于读取存储器单元的新的读取电平电压。 如果应该估计新的读取电平,则根据初始读取电平和驻留时间以及编程/擦除周期的数量计算新的读取电平。 控制器向存储器电路提供表示新的读取电平电压的一个或多个编程命令以读取单元。

    Reducing a number of close operations on open blocks in a flash memory
    86.
    发明授权
    Reducing a number of close operations on open blocks in a flash memory 有权
    在闪存中的开放块上减少一些关闭操作

    公开(公告)号:US08635399B2

    公开(公告)日:2014-01-21

    申请号:US13611577

    申请日:2012-09-12

    CPC classification number: G06F12/0246 G06F2212/7202

    Abstract: The disclosed subject matter includes a memory system with a flash memory and a flash memory controller. The flash memory controller is configured to divide the flash memory into virtual segments, each segment including blocks of flash memory cells. The controller is also configured to receive a write request to a location designated by a memory identifier and to map the memory identifier to a segment. When the segment matches an open segment and an open block can store the data, the controller is configured to retrieve the open segment and the open block from a collection tracking open blocks and to write the data to the open block. When the segment is different from the open segment, the controller is configured to close the open block, to write the data to a block in the segment, and to update the collection with the block in the segment.

    Abstract translation: 所公开的主题包括具有闪存和闪存控制器的存储器系统。 闪速存储器控制器被配置为将闪存分为虚拟段,每个段包括闪存单元块。 控制器还被配置为接收对由存储器标识符指定的位置的写入请求并将存储器标识符映射到段。 当段匹配一个开放段,一个开放块可以存储数据时,控制器被配置为从收集跟踪开放块的集合中检索开放段和开放块,并将数据写入开放块。 当段与开放段不同时,控制器被配置为关闭打开块,将数据写入段中的块,并使用块中的块更新集合。

    Methods for optimizing data movement in solid state devices
    87.
    发明授权
    Methods for optimizing data movement in solid state devices 有权
    用于优化固态设备中数据移动的方法

    公开(公告)号:US08612719B2

    公开(公告)日:2013-12-17

    申请号:US13482865

    申请日:2012-05-29

    Abstract: Techniques for optimizing data movement in electronic storage devices are disclosed. In one particular exemplary embodiment, the techniques may be realized as a method for optimizing data movement in electronic storage devices comprising maintaining, on the electronic storage device, a data structure associating virtual memory addresses with physical memory addresses. Information can be provided regarding the data structure to a host which is in communication with the electronic storage device. Commands can be received from the host to modify the data structure on the electronic storage device, and the data structure can be modified in response to the received command.

    Abstract translation: 公开了用于优化电子存储设备中的数据移动的技术。 在一个特定示例性实施例中,可以将技术实现为用于优化电子存储设备中的数据移动的方法,包括在电子存储设备上维护将虚拟存储器地址与物理存储器地址相关联的数据结构。 可以向与电子存储装置通信的主机提供关于数据结构的信息。 可以从主机接收命令以修改电子存储设备上的数据结构,并且可以响应于所接收的命令修改数据结构。

    Systems and methods for managing key-value stores
    88.
    发明授权
    Systems and methods for managing key-value stores 有权
    用于管理键值存储的系统和方法

    公开(公告)号:US08612402B1

    公开(公告)日:2013-12-17

    申请号:US13662200

    申请日:2012-10-26

    Applicant: STEC, Inc.

    Inventor: Tony Givargis

    CPC classification number: G06F17/30306

    Abstract: Systems and methods for managing key-value stores are disclosed. In some embodiments, the systems and methods may be realized as a method for managing a key-value store including creating an uncompressed tree of key-value pairs, monitoring the growth of the uncompressed tree, compressing the uncompressed tree when the uncompressed tree meets and/or exceeds a specified threshold, and creating a new empty uncompressed tree.

    Abstract translation: 披露了用于管理键值存储的系统和方法。 在一些实施例中,系统和方法可以被实现为用于管理键值存储的方法,包括创建未压缩的键值对树,监视未压缩树的增长,当未压缩树相遇时压缩未压缩树; /或超过指定的阈值,并创建一个新的空未压缩树。

    POWER ARBITRATION FOR STORAGE DEVICES
    90.
    发明申请
    POWER ARBITRATION FOR STORAGE DEVICES 有权
    存储设备的功率仲裁

    公开(公告)号:US20130254562A1

    公开(公告)日:2013-09-26

    申请号:US13842101

    申请日:2013-03-15

    Applicant: STEC, INC.

    CPC classification number: G06F1/266 G06F1/26 G06F1/3275 Y02D10/14

    Abstract: Aspects of the subject disclosure relate to a storage device including a flash memory, a controller coupled to the flash memory, wherein the controller is configured to store data to the flash memory and a power arbiter unit coupled to the controller and to the flash memory via a plurality of flash channels, wherein the power arbiter unit is configured to receive a plurality of power requests via one or more of the plurality of flash channels and process the plurality of power requests based on a respective priority identifier associated with each of the plurality of power requests. Additionally, a computer-implemented method and power arbiter unit (PAB) are provided.

    Abstract translation: 本公开的方面涉及包括闪速存储器,耦合到闪速存储器的控制器的存储设备,其中控制器被配置为将数据存储到闪速存储器,以及功率仲裁器单元,其耦合到控制器和闪速存储器 多个闪存通道,其中所述功率仲裁器单元被配置为经由所述多个闪存通道中的一个或多个接收多个功率请求,并且基于与所述多个闪存通道中的每一个相关联的相应优先级标识符来处理所述多个功率请求 电源请求 另外,提供了计算机实现的方法和功率仲裁单元(PAB)。

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