公开(公告)号：US11830454B2

公开(公告)日：2023-11-28

申请号：US18101270

申请日：2023-01-25

Applicant: Sharp Display Technology Corporation

Inventor： Kengo Hara ,  Tohru Daitoh ,  Yoshihito Hara ,  Jun Nishimura ,  Yohei Takeuchi

IPC: G09G3/36 ,  H01L27/12

CPC classification number: G09G3/3677 ,  H01L27/124 ,  H01L27/1225 ,  G09G2310/0286 ,  G09G2330/021

Abstract: An active matrix substrate includes a gate driver including a shift register including a plurality of unit circuits connected in multiple stages. Each of the plurality of unit circuits includes an output node, a first node, a first TFT including a first gate terminal supplied with the set signal, a first source terminal connected to the first node, and a first drain terminal supplied with a first power supply potential higher than a low-level potential of the set signal, and a second TFT including a second gate terminal connected to the first node, a second source terminal connected to the output node, and a second drain terminal supplied with the clock signal. The first TFT includes a semiconductor layer, and a first and a second gate electrodes disposed on a side of the semiconductor layer opposite to the substrate and connected to the first gate terminal. The semiconductor layer includes a source contact region electrically connected to the first source terminal, a drain contact region electrically connected to the first drain terminal, and a first and a second channel regions separated from each other in a channel length direction between the contact regions when viewed from a normal direction of the substrate. The first gate electrode overlaps the first channel region via an upper gate insulating layer, and the second gate electrode overlaps the second channel region via the upper gate insulating layer.

公开(公告)号：US11825672B2

公开(公告)日：2023-11-21

申请号：US17405301

申请日：2021-08-18

Applicant: Sharp Display Technology Corporation

Inventor： Andrea Zampetti ,  Valerie Berryman-Bousquet

IPC: H10K50/115 ,  H10K50/805 ,  H10K71/00 ,  H10K50/15 ,  H10K50/16 ,  H10K102/00

CPC classification number: H10K50/115 ,  H10K50/805 ,  H10K71/00 ,  H10K50/15 ,  H10K50/16 ,  H10K2102/00

Abstract: A quantum dot light-emitting apparatus includes a substrate, with a first electrode layer located on the substrate. An emissive layer having a first set of quantum dots is electrically coupled with the first electrode layer, and a second electrode layer is also electrically coupled with the emissive layer. The second electrode layer is located opposite the first electrode layer, relative to the emissive layer. A first charge transport layer is placed between the emissive layer and the first electrode layer, and a second charge transport layer is placed between the emissive layer and the second electrode layer. At least one of the first charge transport layer and the second charge transport layer includes a second set of quantum dots.

公开(公告)号：US11817459B2

公开(公告)日：2023-11-14

申请号：US17852418

申请日：2022-06-29

Applicant: Sharp Display Technology Corporation

Inventor： Katsunori Misaki

IPC: G02F1/1368 ,  H01L27/12 ,  H01L27/146 ,  G02F1/1343

CPC classification number: H01L27/1225 ,  G02F1/1368 ,  H01L27/127 ,  H01L27/1462 ,  H01L27/14616 ,  H01L27/14685 ,  H01L27/14692 ,  G02F1/134363 ,  H01L27/14658

Abstract: Each thin film transistor of an active matrix substrate includes an oxide semiconductor layer, a gate electrode disposed closer to the substrate side of the oxide semiconductor layer, a gate insulating layer, a source electrode, and a drain electrode, wherein the oxide semiconductor layer includes a layered structure including a first layer and a second layer disposed on a part of the first layer and extending across the first layer in a channel width direction when viewed in a normal direction of the substrate, the first layer includes an overlapping portion overlapping with the second layer, and a first portion and a second portion each located on a corresponding one of both sides of the second layer, when viewed in a normal direction of the substrate, the second layer covers an upper surface and a side surface of the overlapping portion of the first layer, the source electrode is electrically connected to at least a part of an upper surface of the first portion, and the drain electrode is electrically connected to at least a part of an upper surface of the second portion.

公开(公告)号：US20230341729A1

公开(公告)日：2023-10-26

申请号：US18137402

申请日：2023-04-20

Applicant: Sharp Display Technology Corporation

Inventor： Takahiro NEMOTO ,  Shogo NISHIWAKI

IPC: G02F1/1343 ,  G02F1/1362 ,  H01L27/12 ,  G06F1/16

CPC classification number: G02F1/134309 ,  G02F1/136286 ,  G02F1/13439 ,  H01L27/124 ,  G06F1/163

Abstract: According to an aspect of the disclosure, a display device includes a first substrate, a second substrate, a first wire, a first electrode adjacent to the first wire and closer to the second substrate than the first wire, a second electrode closer to the second substrate than the first electrode and disposed to overlap the first wire and the first electrode, a first overlap section, disposed to overlap at least the first wire, that blocks light, and a third electrode closer to the second substrate than the first wire and further away from the second substate than the first electrode. A plurality of slits is formed in the second electrode, the plurality of slits being placed at spacings from one another and cutting across the first wire and the first electrode. The third electrode is disposed to overlap at least both the first wire and the slits.

公开(公告)号：US20230333427A1

公开(公告)日：2023-10-19

申请号：US18134517

申请日：2023-04-13

Applicant: Sharp Display Technology Corporation

Inventor： Akira HIRAI ,  Yuichi KAWAHIRA ,  Akira SAKAI

IPC: G02F1/1335 ,  G02F1/1368

CPC classification number: G02F1/133531 ,  G02F1/1368

Abstract: A liquid crystal display device includes a first polarizing plate, a first substrate including a thin-film transistor, a liquid crystal layer containing liquid crystal molecules, a second substrate, a second polarizing plate, and a backlight. The first polarizing plate, the first substrate, the liquid crystal layer, the second substrate, the second polarizing plate, and the backlight are arranged in this order. The first substrate has a display area and a frame area placed on an outer edge of the display region. The liquid crystal display device has an ink layer between the frame area of the first substrate and the first polarizing plate. The liquid crystal display device has an internal reflectance ratio y of 0.2 to 0.3. The internal reflectance ratio y is expressed by Formula (1-1).

公开(公告)号：US11789325B2

公开(公告)日：2023-10-17

申请号：US18115664

申请日：2023-02-28

Applicant: Sharp Display Technology Corporation

Inventor： Kikuko Azuma

IPC: G02F1/1339 ,  G02F1/1362 ,  G02F1/1343 ,  G02F1/1335

CPC classification number: G02F1/136204 ,  G02F1/1339 ,  G02F1/134309 ,  G02F1/133514 ,  G02F1/136222 ,  G02F2202/16

Abstract: A liquid crystal display apparatus includes an active matrix substrate, a counter substrate opposing the active matrix substrate, a liquid crystal layer provided between the active matrix substrate and the counter substrate, and a sealing portion that surrounds the liquid crystal layer. The active matrix substrate includes a first substrate and a first transparent conductive layer. The counter substrate includes a second substrate and a second transparent conductive layer. The active matrix substrate further includes a capacitance element that is disposed at an outer side of the sealing portion or disposed at least partially overlapping with the sealing portion. One of the active matrix substrate and the counter substrate further includes a projection structure. A section of the second transparent conductive layer present at an outer side of the sealing portion is in contact with the first transparent conductive layer on a top face of the projection structure.

公开(公告)号：US11789312B2

公开(公告)日：2023-10-17

申请号：US17987803

申请日：2022-11-15

Applicant: Sharp Display Technology Corporation

Inventor： Hirotoshi Yasunaga ,  Hisashi Watanabe ,  Takeshi Masuda

IPC: G02F1/13357 ,  F21V8/00

CPC classification number: G02F1/133606 ,  G02B6/0076 ,  G02F1/133605 ,  G02F1/133603

Abstract: According to an aspect of the disclosure, a lighting device includes: a plurality of light sources; and a plurality of optical sheets disposed to be stacked at a position away from the plurality of light sources. The plurality of optical sheets include a first optical sheet and a second optical sheet. Each of the first optical sheet and the second optical sheet has a unit region that modulates light emitted from a light source for each of the plurality of light sources. The unit region includes a modulation region including a light source region facing the light source, and having a relatively high modulation action of the light as compared with other regions.

公开(公告)号：US20230317028A1

公开(公告)日：2023-10-05

申请号：US18126340

申请日：2023-03-24

Applicant: Sharp Display Technology Corporation

Inventor： Hiroshi TSUCHIYA ,  Koji MURATA ,  Takashi SATOH

IPC: G09G3/36

CPC classification number: G09G3/3696 ,  G09G2320/028

Abstract: A liquid crystal display device includes: an active matrix substrate including a first electrode and a second electrode configured to generate a transverse electrical field; a counter substrate including a plurality of third electrodes disposed at predetermined intervals and having a stripe pattern; a liquid crystal layer located between the active matrix substrate and the counter substrate; and a control circuit. The liquid crystal display device can display an image in a first viewing angle mode and a second viewing angle mode having a viewing angle narrower than the first viewing angle mode by the control circuit switching an amplitude and a waveform of a voltage applied to the third electrodes. The control circuit applies a common voltage having a different value to the first electrode or the second electrode in each of the first viewing angle mode and the second viewing angle mode.

公开(公告)号：US20230315232A1

公开(公告)日：2023-10-05

申请号：US18126826

申请日：2023-03-27

Applicant: Sharp Display Technology Corporation

Inventor： Kazutoshi KIDA ,  Takenori MARUYAMA

IPC: G06F3/041 ,  G06F3/044

CPC classification number: G06F3/0418 ,  G06F3/0445 ,  G06F2203/04105

Abstract: A touch panel system includes a capacitive touch panel and a controller that controls the touch panel. The touch panel includes drive electrodes and floating island electrodes located on a first substrate and position detection electrodes, pressure detection electrodes, and heat detection electrodes located on a second substrate. The drive electrode overlaps at least part of the heat detection electrode and at least part of the pressure detection electrode, and the floating island electrode overlaps at least part of the position detection electrode in plan view. The controller provides a drive signal to the drive electrodes and the heat detection electrodes and corrects a pressure detection signal obtained from each of the pressure detection electrodes by using a heat detection signal obtained from a change in a coupling capacitance between the pressure detection electrode and the heat detection electrode.

公开(公告)号：US20230305347A1

公开(公告)日：2023-09-28

申请号：US18123194

申请日：2023-03-17

Applicant: Sharp Display Technology Corporation

Inventor： Shogo SUZUKI

IPC: G02F1/1362 ,  G02F1/1343 ,  G02F1/1345

CPC classification number: G02F1/136286 ,  G02F1/13439 ,  G02F1/134309 ,  G02F1/13454 ,  G02F2203/66 ,  G02F2203/64 ,  G02F2203/01

Abstract: A liquid crystal display device includes a display area having a plurality of first areas and a plurality of second areas arranged in a matrix in a row direction and a column direction, a plurality of first TFTs each located in one of the plurality of first areas, a plurality of pixel electrodes each located in one of the plurality of first areas, a plurality of transparent electrodes each located in one of the plurality of second areas, a plurality of gate bus lines extending in the row direction and being connected to the plurality of first TFTs, a plurality of source bus lines extending in the column direction and being connected to the plurality of first TFTs, and a plurality of dummy source bus lines each extending in the column direction and being connected to one of the plurality of gate bus lines.