公开(公告)号：US09134986B2

公开(公告)日：2015-09-15

申请号：US14485467

申请日：2014-09-12

Applicant: Flextronics AP, LLC

Inventor： Christopher P. Ricci

IPC: G06F9/44 ,  G06F9/445 ,  G06F13/14 ,  B60R25/01 ,  B60Q11/00 ,  B60W50/00 ,  G06F11/30 ,  H04L12/40 ,  G06F11/07 ,  G06F11/14 ,  G06F11/20 ,  G06F11/34

CPC classification number: G06F8/61 ,  B60Q11/00 ,  B60R25/01 ,  B60W50/00 ,  G06F11/0796 ,  G06F11/1428 ,  G06F11/2035 ,  G06F11/2041 ,  G06F11/3006 ,  G06F11/3051 ,  G06F11/3055 ,  G06F11/3409 ,  G06F11/349 ,  G06F13/10 ,  G06F13/14 ,  H04L12/40 ,  H04L2012/40215 ,  H04L2012/40273

Abstract: The present disclosure describes a microprocessor executable installation supervisor operable to determine, for a selected computational component to be installed in the vehicle, whether the selected computational component satisfies a requirement and/or restriction associated with the selected computational component, when installed, and, when the selected computational component can satisfy the requirement and/or restriction, create a set of data structures in the selected computational component and/or a computer readable medium on board the vehicle to bind the selected computational component to the vehicle.

公开(公告)号：US08977895B2

公开(公告)日：2015-03-10

申请号：US13552237

申请日：2012-07-18

Applicant: Sreekala Anandavally ,  Anand Haridass ,  Gerard M. Salem ,  Diyanesh B. C. Vidyapoornachary

Inventor： Sreekala Anandavally ,  Anand Haridass ,  Gerard M. Salem ,  Diyanesh B. C. Vidyapoornachary

IPC: G06F11/00 ,  G06F11/16

CPC classification number: G06F11/0793 ,  G06F11/0724 ,  G06F11/079 ,  G06F11/1428 ,  G06F11/16 ,  G06F11/2028 ,  G06F11/2041

Abstract: Embodiments of the disclosure are directed to an apparatus that comprises a first core susceptible to an error condition, and a second core configured to perform a diagnostic on the first core to identify a cause of the error condition and an action to remedy the error condition in order to recover the first core.

Abstract translation: 本公开的实施例涉及一种装置，其包括易受错误状况影响的第一核心，以及第二核心，被配置为对第一核心执行诊断以识别错误状况的原因以及纠正错误状况的动作 命令恢复第一核心。

公开(公告)号：US20150006035A1

公开(公告)日：2015-01-01

申请号：US14485467

申请日：2014-09-12

Applicant: Flextronics AP, LLC

Inventor： Christopher P. Ricci

IPC: B60R25/01 ,  G06F9/445

CPC classification number: G06F8/61 ,  B60Q11/00 ,  B60R25/01 ,  B60W50/00 ,  G06F11/0796 ,  G06F11/1428 ,  G06F11/2035 ,  G06F11/2041 ,  G06F11/3006 ,  G06F11/3051 ,  G06F11/3055 ,  G06F11/3409 ,  G06F11/349 ,  G06F13/10 ,  G06F13/14 ,  H04L12/40 ,  H04L2012/40215 ,  H04L2012/40273

Abstract: The present disclosure describes a microprocessor executable installation supervisor operable to determine, for a selected computational component to be installed in the vehicle, whether the selected computational component satisfies a requirement and/or restriction associated with the selected computational component, when installed, and, when the selected computational component can satisfy the requirement and/or restriction, create a set of data structures in the selected computational component and/or a computer readable medium on board the vehicle to bind the selected computational component to the vehicle.

Abstract translation: 本公开描述了一种微处理器可执行安装监视器，其可操作以针对要安装在车辆中的所选择的计算组件确定所选择的计算组件是否满足与所选计算组件相关联的要求和/或限制，当安装时，以及何时 所选择的计算组件可以满足要求和/或限制，在所选择的计算组件中建立一组数据结构和/或车辆上的计算机可读介质以将所选择的计算组件绑定到车辆。

公开(公告)号：US08924779B2

公开(公告)日：2014-12-30

申请号：US13435613

申请日：2012-03-30

Applicant: George Wayne Nation ,  Gary M. Lippert ,  Srinivasa Rao Kothamasu

Inventor： George Wayne Nation ,  Gary M. Lippert ,  Srinivasa Rao Kothamasu

IPC: G06F11/00

CPC classification number: G06F11/0757 ,  G06F11/079 ,  G06F11/1428

Abstract: An apparatus for handling anomalies in a hardware system including a master device and at least one slave device coupled with the master device through an interconnect device is provided. The apparatus includes at least one controller operative to receive status information relating to the slave device. The status information is indicative of whether an anomaly is present in the slave device and/or the interconnect device. The controller is operative to generate output response information as a function of the status information relating to the slave device for detecting and/or responding to hardware system anomalies in a manner which reduces a need for resetting the hardware system to return to normal operation.

Abstract translation: 提供一种用于处理硬件系统中的异常的装置，包括主设备和通过互连设备与主设备耦合的至少一个从设备。 该装置包括至少一个控制器，用于接收与从属设备相关的状态信息。 状态信息表示从属设备和/或互连设备中是否存在异常。 控制器可操作以根据与从属设备有关的状态信息的函数产生输出响应信息，用于以减少硬件系统复位以恢复正常操作的方式检测和/或响应硬件系统异常。

公开(公告)号：US08892944B2

公开(公告)日：2014-11-18

申请号：US13541374

申请日：2012-07-03

Applicant: Yao-Chun Cheng ,  Yuan-Ning Lien ,  Chuan Yung Liu ,  Feng-I Liu ,  Kuei Huang Liu ,  Michael J. Peters

Inventor： Yao-Chun Cheng ,  Yuan-Ning Lien ,  Chuan Yung Liu ,  Feng-I Liu ,  Kuei Huang Liu ,  Michael J. Peters

IPC: G06F11/00 ,  G06F11/14 ,  G06F11/20

CPC classification number: G06F11/1417 ,  G06F11/1428 ,  G06F11/2025 ,  G06F11/2038 ,  G06F11/2043

Abstract: A method for handling a failed processor of a multiprocessor system, the multiprocessor system comprising at least two processors interconnected by processor interconnects for transactions between processors, the processors comprising a first processor and a second processor, the first processor being set as a default boot processor in response to a boot-up operation of the multiprocessor system. The method comprises: detecting and receiving, via a baseboard management module, health information of the at least two processors; providing a multiplexer operative to switch between the at least two processors, the multiplexer being coupled to the baseboard management module and respectively to the at least two processors; and, in response to the health information indicating the first processor has failed, setting, via a processor ID controller, the second processor as the default boot processor and enabling, via the baseboard management module, the multiplexer to switch to the second processor.

Abstract translation: 一种用于处理多处理器系统的故障处理器的方法，所述多处理器系统包括由处理器互连互连的至少两个处理器，用于处理器之间的事务，所述处理器包括第一处理器和第二处理器，所述第一处理器被设置为默认引导处理器 响应于多处理器系统的启动操作。 该方法包括：经由基板管理模块检测和接收至少两个处理器的健康信息; 提供多路复用器，用于在所述至少两个处理器之间切换，所述多路复用器耦合到所述基板管理模块并且分别耦合到所述至少两个处理器; 并且响应于指示第一处理器失败的健康信息，经由处理器ID控制器将第二处理器设置为默认引导处理器，并且经由基板管理模块使多路复用器能够切换到第二处理器。

公开(公告)号：US08819484B2

公开(公告)日：2014-08-26

申请号：US13268068

申请日：2011-10-07

Applicant: Ralph M. Begun ,  Michael Decesaris ,  Randolph S. Kolvick ,  Steven L. Vanderlinden

Inventor： Ralph M. Begun ,  Michael Decesaris ,  Randolph S. Kolvick ,  Steven L. Vanderlinden

IPC: G06F11/00

CPC classification number: G06F11/1428 ,  G06F11/0724 ,  G06F11/0751

Abstract: Methods, apparatuses, and computer program products for dynamically reconfiguring a primary processor identity within a multi-processor socket server are provided. Embodiments include detecting, by the service processor, a processor socket reconfiguration event corresponding to a first processor socket; disabling, by the service processor, the first processor socket of the server in response to detecting the processor socket reconfiguration event; and reassigning, by the service processor, the primary processor identity to a second processor socket of the server.

Abstract translation: 提供了用于在多处理器插座服务器内动态地重新配置主处理器标识的方法，装置和计算机程序产品。 实施例包括由服务处理器检测对应于第一处理器插座的处理器插座重新配置事件; 响应于检测到处理器插座重新配置事件，由服务处理器禁用服务器的第一处理器插槽; 以及由所述服务处理器将所述主处理器标识重新分配给所述服务器的第二处理器插槽。

公开(公告)号：US20140095921A1

公开(公告)日：2014-04-03

申请号：US14034068

申请日：2013-09-23

Applicant: FUJITSU LIMITED

Inventor： Hidefumi Kobayashi ,  Tatsuya Yanagisawa

IPC: G06F11/14

CPC classification number: G06F11/1417 ,  G06F11/0727 ,  G06F11/0775 ,  G06F11/0781 ,  G06F11/1428 ,  G06F11/1441 ,  G06F11/2007 ,  G06F11/2089

Abstract: An information processing apparatus that performs a startup control of redundantly configured modules includes a memory to retain abnormality information regarding an abnormality that occurs at time of startup control of the modules, and a startup controller section executing a startup process by sequentially executing the process, generating the abnormality information, determining whether a reduced operation is possible or not when the module in which an abnormality occurs at the time of startup control is detected, completing an execution of the process block in progress when it is determined that the reduced operation is possible, executing a restart process on a module selected from all the modules in which abnormalities occur at the time of startup control based on the abnormality information and completing an execution of the process block in progress after completing the restart process when determined that the reduced operation is not possible.

Abstract translation: 执行冗余配置模块的启动控制的信息处理装置包括：存储器，用于保持关于在模块的启动控制时发生的异常的异常信息;以及启动控制器部分，通过顺序执行该处理来执行启动处理，生成 所述异常信息被检测到当启动控制时发生异常的模块被检测到是否可以执行缩减操作时，当确定可以进行缩小操作时完成正在进行的处理块的执行， 在从基于异常信息的启动控制时发生异常的所有模块中选择的模块执行重新启动处理，并且当确定所述减少的操作不是时，完成重新启动过程之后完成重新启动过程中的进程块的执行 可能。

公开(公告)号：US20130091380A1

公开(公告)日：2013-04-11

申请号：US13268068

申请日：2011-10-07

Applicant: Michael Decesaris ,  Ralph M. Begun ,  Randolph S. Kolvick ,  Steven L. Vanderlinden

Inventor： Michael Decesaris ,  Ralph M. Begun ,  Randolph S. Kolvick ,  Steven L. Vanderlinden

IPC: G06F15/76 ,  G06F9/02 ,  G06F11/20

CPC classification number: G06F11/1428 ,  G06F11/0724 ,  G06F11/0751

Abstract: Methods, apparatuses, and computer program products for dynamically reconfiguring a primary processor identity within a multi-processor socket server are provided. Embodiments include detecting, by the service processor, a processor socket reconfiguration event corresponding to a first processor socket; disabling, by the service processor, the first processor socket of the server in response to detecting the processor socket reconfiguration event; and reassigning, by the service processor, the primary processor identity to a second processor socket of the server.

Abstract translation: 提供了用于在多处理器插座服务器内动态地重新配置主处理器标识的方法，装置和计算机程序产品。 实施例包括由服务处理器检测对应于第一处理器插座的处理器插座重新配置事件; 响应于检测到处理器插座重新配置事件，由服务处理器禁用服务器的第一处理器插槽; 以及由所述服务处理器将所述主处理器标识重新分配给所述服务器的第二处理器插槽。

公开(公告)号：US20130091379A1

公开(公告)日：2013-04-11

申请号：US13625553

申请日：2012-09-24

Applicant: Mikael B. Taveniku ,  Jeffrey E. Smith

Inventor： Mikael B. Taveniku ,  Jeffrey E. Smith

IPC: G06F11/14

CPC classification number: G06F11/1469 ,  G06F3/061 ,  G06F3/0656 ,  G06F3/0683 ,  G06F11/0727 ,  G06F11/1428 ,  G06F11/2094

Abstract: A system and method for high speed data recording includes a control computer and a disk pack unit. The disk pack is provided within a shell that provides handling and protection for the disk packs. The disk pack unit provides cooling of the disks and connection for power and disk signaling. A standard connection is provided between the control computer and the disk pack unit. The disk pack units are self sufficient and able to connect to any computer. Multiple disk packs are connected simultaneously to the system, so that one disk pack can be active while one or more disk packs are inactive. To control for power surges, the power to each disk pack is controlled programmatically for the group of disks in a disk pack.

Abstract translation: 用于高速数据记录的系统和方法包括控制计算机和盘组件。 磁盘包提供在一个外壳内，为磁盘包提供处理和保护。 磁盘组件提供磁盘的冷却和电源和磁盘信号的连接。 在控制计算机和磁盘组件之间提供标准连接。 磁盘包装单元是自给自足的，能够连接到任何计算机。 多个磁盘包同时连接到系统，以便在一个或多个磁盘组处于非活动状态时，一个磁盘组可以处于活动状态。 为了控制电涌，对于磁盘组中的一组磁盘，以编程方式控制每个磁盘组的电源。

公开(公告)号：US20120278653A1

公开(公告)日：2012-11-01

申请号：US13541374

申请日：2012-07-03

Applicant: Yao-Chun Cheng ,  Yuan-Ning Lien ,  Chuan Yung Liu ,  Feng-I Liu ,  Kuei Huang Liu ,  Michael J. Peters

Inventor： Yao-Chun Cheng ,  Yuan-Ning Lien ,  Chuan Yung Liu ,  Feng-I Liu ,  Kuei Huang Liu ,  Michael J. Peters

IPC: G06F11/20

CPC classification number: G06F11/1417 ,  G06F11/1428 ,  G06F11/2025 ,  G06F11/2038 ,  G06F11/2043

Abstract: A method for handling a failed processor of a multiprocessor system, the multiprocessor system comprising at least two processors interconnected by processor interconnects for transactions between processors, the processors comprising a first processor and a second processor, the first processor being set as a default boot processor in response to a boot-up operation of the multiprocessor system. The method comprises: detecting and receiving, via a baseboard management module, health information of the at least two processors; providing a multiplexer operative to switch between the at least two processors, the multiplexer being coupled to the baseboard management module and respectively to the at least two processors; and, in response to the health information indicating the first processor has failed, setting, via a processor ID controller, the second processor as the default boot processor and enabling, via the baseboard management module, the multiplexer to switch to the second processor.

Abstract translation: 一种用于处理多处理器系统的故障处理器的方法，所述多处理器系统包括由处理器互连互连的至少两个处理器，用于处理器之间的事务，所述处理器包括第一处理器和第二处理器，所述第一处理器被设置为默认引导处理器 响应于多处理器系统的启动操作。 该方法包括：经由基板管理模块检测和接收至少两个处理器的健康信息; 提供多路复用器，用于在所述至少两个处理器之间切换，所述多路复用器耦合到所述基板管理模块并且分别耦合到所述至少两个处理器; 并且响应于指示第一处理器失败的健康信息，经由处理器ID控制器将第二处理器设置为默认引导处理器，并且经由基板管理模块使多路复用器能够切换到第二处理器。