Abstract:
An electro-phoretic display film includes a conductive layer, a dielectric layer disposed on the conductive layer, a plurality of electro-phoretic display media, and a sealing material. The dielectric layer has a plurality of micro-cups arranged in an array and a trench surrounding the micro-cups. The electro-phoretic display media are exclusively disposed within the micro-cups, and the sealing material is exclusively disposed within the trench.
Abstract:
A method of controlling the capacitance of the TFT-LCD storage capacitor is provided. The gate dielectric layer of the TFT is composed of a silicon nitride layer, a dielectric layer and a silicon nitride layer, and the etching selectivity of the amorphous silicon layer over the dielectric layer is not less than about 5.0. Therefore, the dielectric layer can be an etching stop layer when a doped and an undoped amorphous silicon layers are etched to form source/drain stacked layers or a conductive layer is etched to form a gate on the gate dielectric layer. Hence, the dielectric layer thickness can be controlled; thereby the capacitance of the storage capacitor can be controlled.
Abstract:
A pixel structure is formed in a pixel area and coupled to a scan line and a data line. The pixel structure includes a first transistor, a second transistor and a pixel electrode. The first transistor is formed in the pixel area and coupled to the scan line and the data line. The second transistor is formed in the pixel area and coupled to the first transistor. The pixel electrode is formed in the pixel area and coupled to the second transistor. The pixel electrode includes a main portion and a first branch portion. The first branch portion is disposed between the first transistor and the second transistor. An electrophoretic display including the pixel structure is also disclosed herein.
Abstract:
An all-in-one adapter container. The all-in-one adapter container comprises a space, a cover covering the space, at least one power line, a printed circuit board (PCB) and at least one line-arranging mechanism. The line-arranging mechanism provides arrangement for the power line. The printed circuit board is electrically connected to the power line.
Abstract:
A method of controlling the capacitance of a thin film transistor liquid crystal display (TFT-LCD) storage capacitor is disclosed. In certain embodiments, the method includes i) forming a silicon island and a bottom electrode on the transparent substrate, the silicon island having an undoped region located on the central portion, and two doped regions respectively located on both sides, ii) forming a first silicon nitride layer on the transparent substrate, and iii) forming a stacked layer comprising a second silicon nitride layer and a conductive layer on the undoped region of the silicon island, and the first conductive layer of the stacked layer serving as a gate of a thin film transistor, wherein an etching selectivity ratio of the conductive layer over the dielectric layer is not less than about 5.0.
Abstract:
An arranging-line mechanism comprises a cam, an axle connecting to the cam, a sliding element and a transmitting mechanism to drive the cam and the axle. The cam comprises an inclined surface and the sliding element to slide thereon. When the axle revolves, the transmitting mechanism drives the cam to revolve. A power line is wound regularly via the sliding element to slide on the inclined surface.
Abstract:
A method of controlling the capacitance of a thin film transistor liquid crystal display (TFT-LCD) storage capacitor is disclosed. In certain embodiments, the method includes i) forming an undoped amorphous silicon layer on a silicon nitride layer, ii) forming an etching mask on the undoped amorphous silicon layer, and iii) forming two doped amorphous silicon layers on portion of the undoped amorphous silicon layer and the etching mask, the two doped amorphous silicon layers being spaced apart and located on either side of the gate, wherein an etching selectivity ratio of the undpoed and doped amorphous silicon layers over the dielectric layer being not less than about 5.0.
Abstract:
An electro-phoretic display film includes a conductive layer, a dielectric layer disposed on the conductive layer, a plurality of electro-phoretic display media, and a sealing material. The dielectric layer has a plurality of micro-cups arranged in an array and a trench surrounding the micro-cups. The electro-phoretic display media are exclusively disposed within the micro-cups, and the sealing material is exclusively disposed within the trench.
Abstract:
A sphygmomanometer capable of adjusting a viewing angle of a display screen includes a housing, and the housing includes a lower casing and an upper casing. The lower casing includes a pivotal axle and a position limit mechanism. The upper casing has a containing space for containing a rotating body, and a display screen installed on a side of the rotating body, and a shaft protruded from another side of the rotating body which faces the lower casing. The shaft is sheathed onto the pivotal axle for the use of the sphygmomanometer. When the sphygmomanometer is worn onto a user's wrist or arm, the pivotal axle and the shaft are operated to turn the display screen on the rotating body to an appropriate position, so as to facilitate the user or medical professionals to view the reading of the measurement on the display screen.
Abstract:
A thin film transistor array substrate of a thin film transistor liquid crystal display (TFT-LCD) is provided. The gate dielectric layer of the TFT includes a silicon nitride layer, a dielectric layer and a silicon nitride layer, and the etching selectivity of the amorphous silicon layer over the dielectric layer is not less than about 5.0. Therefore, the dielectric layer can be an etching stop layer when doped and undoped amorphous silicon layers are etched to form source/drain stacked layers or a conductive layer is etched to form a gate on the gate dielectric layer. Hence, the dielectric layer thickness can be controlled, and thereby the capacitance of the storage capacitor can be controlled.