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    Modular Decking System
    1.
    发明申请
    Modular Decking System 有权

    公开(公告)号：US20250003206A1

    公开(公告)日：2025-01-02

    申请号：US18617929

    申请日：2024-03-27

    Applicant: David Ward

    Inventor： David Ward

    IPC: E04B1/19

    Abstract: A modular decking system that includes prefabricated modular decking panels available in a variety of lengths utilized to build a separate deck to an individual's desired size and layout. The prefabricated modular decking panels are made of pressure-treated 2″×6″ lumber studs, deck-boards, joist hangers, and deck screws that are inserted into a frame made of previously installed posts and headboards. The modular decking system allows for quick installation and set-up. The modular decking panels are easily deconstructed and transported for use in multiple locations. In an alternate embodiment, an additional brace is used to support a 4″×4″ post to adapt the modular decking panels for use as a temporary on-location flatform. Multiple modular decking systems can be fastened together to customize an overall flatform needed at a specific location as well. The modular decking system includes a corresponding method for assembling.

    Efficient sheet map loading for print jobs
    2.
    发明授权
    Efficient sheet map loading for print jobs 有权

    公开(公告)号：US11308372B1

    公开(公告)日：2022-04-19

    申请号：US17220911

    申请日：2021-04-01

    Applicant: Dakota Peck ,  Katie Ashley Eng ,  David Ward

    Inventor： Dakota Peck ,  Katie Ashley Eng ,  David Ward

    IPC: G06K15/02 ,  G06F3/12 ,  G06N20/00

    Abstract: System and methods for efficient sheet map loading for print jobs. In one embodiment, a preflight system processes a print job to build a first sheet mapping for rasterizing and printing the print job, and stores the first sheet mapping. A job controller determines an estimate time to load the first sheet mapping from the memory using job properties as input to estimator logic. In response to determining that the estimate time for loading the first sheet mapping from the memory is shorter than a time threshold, the first sheet mapping is loaded from memory, and provided for rasterizing and printing. Otherwise, if the estimate time is longer than the time threshold, the job controller builds a second sheet mapping, and provides the second sheet mapping in increments for the rasterizing and the printing of the print job as the building of the second sheet mapping is in progress.

    Adaptive flushing using bit planes
    3.
    发明授权
    Adaptive flushing using bit planes 有权

    公开(公告)号：US11072178B1

    公开(公告)日：2021-07-27

    申请号：US16800842

    申请日：2020-02-25

    Applicant: Walter F. Kailey ,  David Ward

    Inventor： Walter F. Kailey ,  David Ward

    IPC: B41J2/165

    Abstract: Systems, methods, software for adaptive flushing. In one embodiment, an adaptive flushing system obtains bit plane data from a plurality of bit planes, and arranges the bit plane data into one or more pixel blocks. For a pixel block, the adaptive flushing system identifies a flush record for the pixel block that indicates a flush eligibility status for each of the pixels in the pixel block, and updates the flush record to indicate the flush eligibility status as flush-ineligible for each of the pixels in the pixel block having a jetting symbol specified in the bit planes. The adaptive flushing system selects a candidate pixel(s) from the pixel block as a candidate for flushing, and modifies the bit plane data in one or more of the bit planes to include a flush symbol at the candidate pixel when the candidate pixel has a flush eligibility status that is flush eligible.

    Vectorized multi-level halftoning using ternary logic
    4.
    发明授权
    Vectorized multi-level halftoning using ternary logic 有权

    公开(公告)号：US10855881B1

    公开(公告)日：2020-12-01

    申请号：US16719299

    申请日：2019-12-18

    Applicant: Walter F. Kailey ,  Thomas Rutkowski ,  David Ward

    Inventor： Walter F. Kailey ,  Thomas Rutkowski ,  David Ward

    IPC: H04N1/405 ,  G06K15/02 ,  H04N1/40

    Abstract: Systems, methods, software for halftoning. In one embodiment, a halftone system receives a raster image comprising an array of pixels, and performs a multi-level halftoning process on one or more blocks of the pixels. The system identifies thresholds that distinguish different intensity levels. For each block, the system identifies a set of pixel values for the pixels in the block, performs a vectorized comparison of the set of pixel values to each of the thresholds to generate sets of comparison bits, and performs ternary logic operations with three of the sets of comparison bits as input to define a set of low-order bits and a set of higher-order bits for the pixels in the block.

    PAGE COMPLEXITY ANALYSIS FOR PRINT JOBS
    5.
    发明申请
    PAGE COMPLEXITY ANALYSIS FOR PRINT JOBS 审中-公开

    公开(公告)号：US20200285430A1

    公开(公告)日：2020-09-10

    申请号：US16292592

    申请日：2019-03-05

    Applicant: Justin J. Coulter ,  David Ward

    Inventor： Justin J. Coulter ,  David Ward

    IPC: G06F3/12 ,  G06K15/02

    Abstract: A subset of pages in a job are analyzed for page complexity to determine if a repeating complexity pattern is present in the job. If a repeating complexity pattern is found, then the page complexities can be extrapolated to other pages in the job. One embodiment comprises a plurality of Raster Image Processors (RIPs) and a scheduler. The scheduler receives a print job, identifies a subset of logical pages in the print job for complexity analysis, and calculates a page complexity value for logical pages in the subset. The scheduler determines that a repeating pattern of page complexity values is present in the subset, and assigns page complexity values to remaining logical pages in the print job by extrapolating the repeating pattern of page complexity values to the remaining logical pages. The scheduler assigns the logical pages in the print job to the RIPs based on their page complexity value.

    Raster image processor allocation scheme
    6.
    发明授权
    Raster image processor allocation scheme 有权

    公开(公告)号：US10656888B1

    公开(公告)日：2020-05-19

    申请号：US16286936

    申请日：2019-02-27

    Applicant: Justin J. Coulter ,  David Ward

    Inventor： Justin J. Coulter ,  David Ward

    IPC: G06F3/12 ,  G06K15/02

    Abstract: Embodiments herein describe RIP allocation schemes that consider a number of factors during page scheduling to improve the performance of a print controller. One embodiment comprises an apparatus that includes a plurality of RIPs collectively comprising a total number of RIPs that process logical pages. The apparatus further includes a scheduler. The scheduler receives a print job, determines that a number of available RIPs of the plurality of RIPs to process logical pages in the print job is less than the total number of RIPs, and to iteratively increase a number of the logical pages in the print job that are assigned to each of the available RIPs as the number of available RIPs increases over time.

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