公开(公告)号：US06613600B2

公开(公告)日：2003-09-02

申请号：US09999815

申请日：2001-10-24

Applicant: Dean Tran ,  Edward A. Rezek ,  Eric R. Anderson ,  William L. Jones

Inventor： Dean Tran ,  Edward A. Rezek ,  Eric R. Anderson ,  William L. Jones

IPC: H01L2100

CPC classification number: G02B6/4214 ,  H01L31/02161 ,  H01L31/02327

Abstract: A resonant photodetector assembly (10) which uses multiple reflections of light within a photodetector (20) to convert input light into an electrical signal. The photodetector (20) includes a combination of generally planar semiconductor layers including a photodetector active layer (36) where light is converted into an electrical output. The photodetector (20) further includes a first outer electrical contact layer (34) and a second outer electrical contact layer (42). A waveguide (22) is positioned on the photodetector (20) and has a waveguide active layer (26) positioned between a pair of waveguide cladding layers (24, 28), a first end (30) for receiving input light and a second end (50) for reflecting the light. A reflector (32) is positioned on the second end (50) of the waveguide (22) at an angle relative to a line parallel to the substrate (14), where the reflector (32) reflects the light received by the first end (30) of the waveguide active layer (26) towards the photodetector (20). A reflector (38) is positioned on the second outer layer (42) of the photodetector (20) and provides a reflective surface for reflecting the light within the photodetector (20).

公开(公告)号：US06423575B1

公开(公告)日：2002-07-23

申请号：US09917318

申请日：2001-07-27

Applicant: Dean Tran ,  Jerry T. Fang

Inventor： Dean Tran ,  Jerry T. Fang

IPC: H01L2320

CPC classification number: H01L23/26 ,  H01L2224/32245 ,  H01L2224/73265 ,  H01L2924/0002 ,  H01L2924/1032 ,  H01L2924/1423 ,  H01L2924/3011 ,  H01L2924/00

Abstract: Disclosed are hydrogen gettering structure (11) and use of such structure and methods of forming such structure. The hydrogen gettering structure (11) includes a titanium member (1) and a silver-doped palladium layer (3) on the titanium member (1), the silver assisting palladium to increase the hydrogen gettering. The silver-doped palladium can be deposited on the titanium member by sputtering. The hydrogen gettering structure (11) can be attached to a semiconductor module component (7) and incorporated in a semiconductor module (10) to increase hydrogen gettering, or can be included in other structure (e.g., nuclear reactor structure) where absorption or gettering of hydrogen is necessary or desired.

Abstract translation: 公开了吸氢结构（11）以及使用这种结构和形成这种结构的方法。 氢吸气结构（11）在钛构件（1）上包括钛构件（1）和银掺杂钯层（3），银助钯以增加吸氢性。 可以通过溅射将银掺杂的钯沉积在钛构件上。 氢吸气结构（11）可以附接到半导体模块组件（7）并且并入到半导体模块（10）中以增加吸氢性，或者可以包括在吸收或吸气的其它结构（例如，核反应堆结构） 的氢是必需的或期望的。

公开(公告)号：US06252725B1

公开(公告)日：2001-06-26

申请号：US09498634

申请日：2000-02-07

Applicant: Dean Tran ,  Eric R. Anderson ,  Ronald L. Strijek ,  Edward A. Rezek ,  Luis M. Rochin

Inventor： Dean Tran ,  Eric R. Anderson ,  Ronald L. Strijek ,  Edward A. Rezek ,  Luis M. Rochin

IPC: G02B702

CPC classification number: H01L31/18 ,  G02B6/122 ,  G02B6/42 ,  G02B6/4246 ,  G02B2006/12102 ,  G02B2006/12114 ,  G02B2006/12176 ,  H01L33/005

Abstract: A method for fabricating a monolithic micro-optical component. The construction of the micro-optical components is accomplished by using standard semiconductor fabrication techniques. The method comprises the steps of depositing an etch stop layer (44) onto a semiconductor substrate (42); depositing an optical component layer (46) onto the etch stop layer (44); coating the entire surface of the optical component layer with a photoresist material; applying a photoresist mask (50) to the photoresist material on the optical component layer (46); selectively etching away the optical component layer (46) to form at least one optical column (52); forming a pedestal (54) for each of the optical columns (52) by selectively etching away the etch stop layer (44); and finally polishing each of the optical columns (52), thereby forming monolithic optical components (56). The method may optionally include the step of removing the photoresist mask from each of the optical columns prior to polishing the optical columns, as well as the step of depositing an antireflectivity coating onto each of the optical components.

Abstract translation: 一种用于制造单片微光学部件的方法。 微型光学部件的构造通过使用标准半导体制造技术来实现。 该方法包括以下步骤：在半导体衬底（42）上沉积蚀刻停止层（44）; 在所述蚀刻停止层（44）上沉积光学部件层（46）; 用光致抗蚀剂材料涂覆光学部件层的整个表面; 将光致抗蚀剂掩模（50）施加到光学部件层（46）上的光致抗蚀剂材料上; 选择性地蚀刻掉光学部件层（46）以形成至少一个光学柱（52）; 通过选择性地蚀刻掉蚀刻停止层（44），为每个光学柱（52）形成基座（54）; 并最后对每个光学柱（52）进行抛光，由此形成单片光学部件（56）。 该方法可以可选地包括在抛光光学柱之前从每个光学柱去除光致抗蚀剂掩模的步骤，以及在每个光学部件上沉积抗反射涂层的步骤。

公开(公告)号：US06187515B1

公开(公告)日：2001-02-13

申请号：US09074188

申请日：1998-05-07

Applicant: Dean Tran ,  Eric R. Anderson ,  Ronald L. Strijek ,  Edward A. Rezek

Inventor： Dean Tran ,  Eric R. Anderson ,  Ronald L. Strijek ,  Edward A. Rezek

IPC: G02B636

CPC classification number: G02B6/4214 ,  G02B6/423

Abstract: The invention relates to an optical integrated circuit microbench system for accurately aligning optical fiber and waveguides to efficiently couple energy between optical devices. This is accomplished by using the anisotropic etch characteristics of III-V semiconductor materials in two orthogonal directions. One etch direction serves to provide a channel for precise fiber-positioning; the other direction, which is orthogonal provides a reflecting surface for directing the optical energy onto optical devices.

Abstract translation: 本发明涉及一种用于精确对准光纤和波导以在光学器件之间有效耦合能量的光学集成电路微型平台系统。 这是通过在两个正交方向上使用III-V半导体材料的各向异性蚀刻特性来实现的。 一个蚀刻方向用于提供用于精确光纤定位的通道; 正交的另一方向提供用于将光能引导到光学装置上的反射表面。

公开(公告)号：US06172414B2

公开(公告)日：2001-01-09

申请号：US09067222

申请日：1998-04-28

Applicant: Dean Tran ,  Eric R. Anderson ,  Ronald L. Strijek ,  Edward A. Rezek

Inventor： Dean Tran ,  Eric R. Anderson ,  Ronald L. Strijek ,  Edward A. Rezek

IPC: H01L2304

CPC classification number: H01L24/75 ,  H01L2224/75 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  Y10T29/49144 ,  Y10T29/49544

Abstract: An interconnected apparatus for producing a low loss, reproducible electrical interconnection between a semiconductor device and a substrate includes a rod and rod receptor. The rod, generally cylindrically shaped, is attached to the semiconductor device and includes an outer circumferential wall which comes into contact with the rod receptor during a bonding process. A lip portion is formed on one end of the rod receptor for interlocking engagement with the rod. The rod receptor is plated on the substrate and includes a generally circularly shaped body which forms a centrally disposed well for receiving the rod. A lip portion is formed on one end or mouth of the rod receptor for interlocking engagement with the rod. When the rod and corresponding receptor are aligned and brought together, the rod deforms and interlocks with its corresponding rod receptor. A thermo-compression bonding process is utilized to bond the rod to the rod receptor, thereby producing a strong interlocking bond.

Abstract translation: 用于在半导体器件和衬底之间产生低损耗，可再现的电互连的互连设备包括棒和棒接收器。 通常为圆柱形的杆附接到半导体器件，并且包括在接合过程中与杆接收器接触的外周壁。 唇形部分形成在杆接收器的一端上以与杆互锁接合。 杆接收器被电镀在基底上，并且包括大致圆形的主体，其形成用于容纳杆的居中设置的孔。 唇形部分形成在杆接收器的一端或口上，用于与棒互锁接合。 当杆和相应的接收器对准并聚集在一起时，杆变形并与其相应的杆接收器互锁。 利用热压接合方法将棒粘合到杆接收器，从而产生强的互锁键。

公开(公告)号：US07610676B2

公开(公告)日：2009-11-03

申请号：US11676467

申请日：2007-02-19

Applicant: Dean Tran ,  Alan Hirschberg ,  Melissa Fuller ,  Phillip Hayes ,  Greg Keller

Inventor： Dean Tran ,  Alan Hirschberg ,  Melissa Fuller ,  Phillip Hayes ,  Greg Keller

IPC: H01R43/04

CPC classification number: H01R43/048 ,  H01R4/20 ,  Y10T29/4914 ,  Y10T29/49181 ,  Y10T29/49192 ,  Y10T29/49194 ,  Y10T29/49213 ,  Y10T29/49218

Abstract: A method for assembling a bundle cable connector assembly that eliminates bird caging, wire threads extruding through a connector pin, loose wire threads, dielectric shield shrinking, etc. The method includes stripping the wire to create a birdcage preventative zone and an exposed tip with a crimping zone therebetween, and tinning the exposed wire at the birdcage preventative zone and the tip. The method then includes inserting the wire into a connector pin, and crimping the pin to the wire at the crimping zone using heat so that the tinning solder melts. The method then includes mounting the pin to a connector body and mounting a wire-locking device to the connector body to lock the pin to the connector body.

Abstract translation: 一种用于组装束电缆连接器组件的方法，其消除鸟笼，通过连接器销挤出的线丝，松散的线螺纹，电介质屏蔽收缩等。该方法包括剥离线以产生鸟笼预防区和暴露的尖端，其具有 在其间的卷边区域，以及在鸟笼预防区域和尖端处涂覆暴露的线。 该方法然后包括将线插入连接器针中，并且使用热量将引脚压接在压接区处的导线上，使得镀锡焊料熔化。 该方法然后包括将销安装到连接器主体并将线锁定装置安装到连接器主体以将销锁定到连接器主体。

公开(公告)号：US07476606B2

公开(公告)日：2009-01-13

申请号：US11390772

申请日：2006-03-28

Applicant: Dean Tran ,  Alan Hirschberg ,  Ha K. DeMarco ,  Luis Rochin ,  Thomas Chung ,  Mark Kintis ,  Steven J. Mass

Inventor： Dean Tran ,  Alan Hirschberg ,  Ha K. DeMarco ,  Luis Rochin ,  Thomas Chung ,  Mark Kintis ,  Steven J. Mass

IPC: H01L21/00 ,  H01L21/28

CPC classification number: H01L21/2007

Abstract: Ultra-high speed semiconductors that are usually very thin and therefore very fragile still require connection to a circuit board and a heat transfer pathway. Ultra-high speed circuits and semiconductor devices are provided with a carrier plate formed on the backside of a wafer or substrate by a variety of deposition methods. The carrier plate is a series of metal layers, each being selected to enable the attachment of a relatively thick copper carrier plate to the backside of the substrate or wafer.

Abstract translation: 通常非常薄且因此非常脆弱的超高速半导体仍需要连接到电路板和传热通路。 超高速电路和半导体器件具有通过各种沉积方法形成在晶片或衬底的背面上的载体板。 载体板是一系列金属层，每个金属层被选择为能够将相对厚的铜载体板附接到基板或晶片的背面。

公开(公告)号：US20070235744A1

公开(公告)日：2007-10-11

申请号：US11390772

申请日：2006-03-28

Applicant: Dean Tran ,  Alan Hirschberg ,  Ha DeMarco ,  Luis Rochin ,  Thomas Chung ,  Mark Kintis ,  Steven Mass

Inventor： Dean Tran ,  Alan Hirschberg ,  Ha DeMarco ,  Luis Rochin ,  Thomas Chung ,  Mark Kintis ,  Steven Mass

IPC: H01L33/00

CPC classification number: H01L21/2007

Abstract: Ultra-high speed semiconductors that are usually very thin and therefore very fragile still require connection to a circuit board and a heat transfer pathway. Ultra-high speed circuits and semiconductor devices are provided with a carrier plate formed on the backside of a wafer or substrate by a variety of deposition methods. The carrier plate is a series of metal layers, each being selected to enable the attachment of a relatively thick copper carrier plate to the backside of the substrate or wafer.

Abstract translation: 通常非常薄且因此非常脆弱的超高速半导体仍需要连接到电路板和传热通路。 超高速电路和半导体器件具有通过各种沉积方法形成在晶片或衬底的背面上的载体板。 载体板是一系列金属层，每个金属层被选择为能够将相对厚的铜载体板附接到基板或晶片的背面。

公开(公告)号：US06945447B2

公开(公告)日：2005-09-20

申请号：US10162973

申请日：2002-06-05

Applicant: Dean Tran ,  Salim Akbany ,  Maurice Lowery ,  Leon M. Singleton, Jr. ,  Ronald A. DePace

Inventor： Dean Tran ,  Salim Akbany ,  Maurice Lowery ,  Leon M. Singleton, Jr. ,  Ronald A. DePace

IPC: B23K1/00 ,  B23K1/012 ,  B23K3/06 ,  B23K35/26 ,  B23K35/30 ,  H01L21/60 ,  H05K3/34 ,  B23K31/00 ,  B23K31/02

CPC classification number: H01L24/27 ,  B23K1/0016 ,  B23K1/012 ,  B23K3/0607 ,  B23K35/262 ,  B23K35/3013 ,  B23K2101/40 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/2919 ,  H01L2224/83065 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/3011 ,  H05K3/3478 ,  H05K3/3494 ,  H01L2924/00 ,  H01L2924/3512

Abstract: A chip or die attachment process and related apparatus, in which a desired quantity of solder (7 or 17) is dispensed onto each, in turn, of a number of desired locations on a substrate (4 or 18), and then an integrated-circuit chip (10) is precisely positioned at each location immediately after the solder is dispensed at that location. Hot gas heaters are used both to heat the solder (7 or 17) as it is dispensed onto the substrate (4 or 18), and to heat the integrated-circuit chip (10) and to reflow the solder beneath the chip. In one form of the invention, the solder is dispensed from a wire spool (1) and melted in position on the substrate (4). Alternatively, the solder is dispensed as a drop (16) from a liquid solder reservoir (13).

Abstract translation: 一种芯片或芯片附接工艺及相关装置，其中在衬底（4或18）上的多个所需位置依次分配所需数量的焊料（7或17），然后， 电路芯片（10）在焊料在该位置被分配之后立即精确地定位在每个位置处。 热气体加热器用于在焊料（7或17）被分配到基板（4或18）上时加热焊料（7或17），并且加热集成电路芯片（10）并使芯片下方的焊料回流。 在本发明的一种形式中，焊料从线轴（1）分配并熔化在基底（4）上的适当位置。 或者，焊剂作为液体（16）从液体焊料储存器（13）分配。

公开(公告)号：US06786652B2

公开(公告)日：2004-09-07

申请号：US10027941

申请日：2001-12-19

Applicant: Christian L. Marquez ,  James A. Hathaway ,  Michelle M. Hazard ,  Dean Tran

Inventor： Christian L. Marquez ,  James A. Hathaway ,  Michelle M. Hazard ,  Dean Tran

IPC: G02B636

CPC classification number: G02B6/4248 ,  G02B6/4224 ,  G02B6/4225 ,  G02B6/4226 ,  G02B6/4237 ,  G02B6/4238

Abstract: A process for fabricating a photonics package includes securing a ferrule to an optical fiber, inserting the ferrule through a movable flange into a photonics housing containing a photodiode, adjusting the ferrule longitudinally within the flange to position the end of the optical fiber with respect to the surface of the photodiode and welding the ferrule to the flange. Thereafter, the ferrule and flange assembly is adjusted laterally with respect to the photodiode and the lower end of the flange is secured to the housing using hot gas injection or laser soldering which allows lateral adjustment of the fiber during the solder cooling process for final positioning with respect to the photodiode.

Abstract translation: 一种制造光子封装的方法包括将套圈固定到光纤上，将套圈穿过可移动凸缘插入到包含光电二极管的光子壳体中，在套管内纵向调节凸缘，以使光纤的端部相对于 光电二极管的表面并将套圈焊接到法兰上。 此后，套管和凸缘组件相对于光电二极管横向调节，并且法兰的下端使用热气体注入或激光焊接固定到壳体，其允许在焊料冷却过程期间横向调节光纤以进行最终定位， 相对于光电二极管。