公开(公告)号：US08738926B2

公开(公告)日：2014-05-27

申请号：US11972310

申请日：2008-01-10

Applicant: Eckhard Delfs ,  Gerard David Jennings

Inventor： Eckhard Delfs ,  Gerard David Jennings

IPC: G06F12/14

CPC classification number: G06F21/74

Abstract: A data processing system including a memory configured to store confidential data and non-confidential data; a cache memory which is configured to cache data stored in the memory and which comprises a first cache memory region and a second cache memory region; a processing circuit configured to carry out, in a first state of the data processing system, a cryptographic algorithm which operates on the confidential data and on the non-confidential data, wherein the confidential data are cached using the first cache memory region and the non-confidential data are cached using the second cache memory region; and an invalidating circuit configured to invalidate the first cache memory region when the data processing system switches from the first state into a second state.

Abstract translation: 一种数据处理系统，包括被配置为存储机密数据和非机密数据的存储器; 高速缓存存储器，被配置为缓存存储在存储器中的数据，其包括第一高速缓冲存储器区域和第二高速缓冲存储器区域; 处理电路，被配置为在所述数据处理系统的第一状态下执行对所述机密数据和所述非机密数据进行操作的密码算法，其中所述机密数据使用所述第一高速缓冲存储器区域和所述非机密数据进行高速缓存， - 使用第二高速缓冲存储器区域缓存 - 保密数据; 以及无效电路，被配置为当数据处理系统从第一状态切换到第二状态时使第一高速缓冲存储器区域无效。

公开(公告)号：US07891009B2

公开(公告)日：2011-02-15

申请号：US11551518

申请日：2006-10-20

Applicant: Gerard David Jennings ,  Eckhard Delfs ,  Uma Ranjan ,  Andreas Siggelkow

Inventor： Gerard David Jennings ,  Eckhard Delfs ,  Uma Ranjan ,  Andreas Siggelkow

IPC: G06F7/04

CPC classification number: G06F21/725 ,  G06F21/10

Abstract: A first time indication which can be changed by a user and stored in a first memory. Furthermore, in the case of a change in the first time indication which is performed externally to the checking device, the difference between the stored first time indication and the changed first time indication is determined. Furthermore, it is checked whether a predetermined criterion is met by using a trustworthy second time indication, the first time indication and the difference.

Abstract translation: 可由用户改变并存储在第一存储器中的第一时间指示。 此外，在从检查装置向外部执行的第一次指示的改变的情况下，确定所存储的第一时间指示与改变的第一时间指示之间的差异。 此外，通过使用可靠的第二时间指示，第一时间指示和差异来检查是否满足预定标准。

公开(公告)号：US20090183009A1

公开(公告)日：2009-07-16

申请号：US11972310

申请日：2008-01-10

Applicant: Eckhard Delfs ,  Gerard David Jennings

Inventor： Eckhard Delfs ,  Gerard David Jennings

IPC: G06F12/14

CPC classification number: G06F21/74

Abstract: A data processing system including a memory configured to store confidential data and non-confidential data; a cache memory which is configured to cache data stored in the memory and which comprises a first cache memory region and a second cache memory region; a processing circuit configured to carry out, in a first state of the data processing system, a cryptographic algorithm which operates on the confidential data and on the non-confidential data, wherein the confidential data are cached using the first cache memory region and the non-confidential data are cached using the second cache memory region; and an invalidating circuit configured to invalidate the first cache memory region when the data processing system switches from the first state into a second state.

Abstract translation: 一种数据处理系统，包括被配置为存储机密数据和非机密数据的存储器; 高速缓存存储器，被配置为缓存存储在存储器中的数据，其包括第一高速缓冲存储器区域和第二高速缓冲存储器区域; 处理电路，被配置为在所述数据处理系统的第一状态下执行对所述机密数据和所述非机密数据进行操作的密码算法，其中所述机密数据使用所述第一高速缓冲存储器区域和所述非机密数据进行高速缓存， - 使用第二高速缓冲存储器区域缓存 - 保密数据; 以及无效电路，被配置为当数据处理系统从第一状态切换到第二状态时使第一高速缓冲存储器区域无效。

公开(公告)号：US20080189559A1

公开(公告)日：2008-08-07

申请号：US11671146

申请日：2007-02-05

Applicant: ECKHARD DELFS

Inventor： ECKHARD DELFS

IPC: G06F12/14

CPC classification number: G06F12/1408 ,  G06F21/60 ,  G06F21/62 ,  G06F21/6209 ,  G06F21/6218 ,  G06F21/72 ,  G06F21/79 ,  G06F2221/2105

Abstract: Computing device with a processing system inclduing a plurality of user sub-systems, a plurality of user sub-system identifiers respectively identifying one user sub-system of the plurality of user sub-systems, a processor configured to run the processing system, a cryptography unit configured to provide at least one cryptographic mechanism, a cryptography unit secret key assigned to the cryptography unit, and a binder configured to bind the cryptography unit secret key to the user sub-system identifier of a currently running user sub-system.

Abstract translation: 具有包括多个用户子系统的处理系统的计算设备，分别标识多个用户子系统中的一个用户子系统的多个用户子系统标识符，被配置为运行处理系统的处理器，密码学 被配置为提供至少一个密码机制的单元，分配给密码单元的密码单元密钥，以及被配置为将密码单元密钥绑定到当前正在运行的用户子系统的用户子系统标识符的绑定。

公开(公告)号：US20050207232A1

公开(公告)日：2005-09-22

申请号：US11083783

申请日：2005-03-18

Applicant: Eckhard Delfs ,  Uwe Hildebrand

Inventor： Eckhard Delfs ,  Uwe Hildebrand

IPC: G11C7/00 ,  G11C11/34 ,  G11C16/04 ,  G11C16/06 ,  G11C16/20

CPC classification number: G11C16/20 ,  G11C16/0483

Abstract: In the access method for a memory chip, particularly for a NAND flash memory chip, the memory access is dependent upon what type of memory chip is used. In this case, the method is intended to support various types of memory chip. According to the inventive method, data are first read from the memory chip which contain a memory-chip-typical information item for the access to the memory chip. The subsequent access to the memory chip is performed using the memory-chip-typical information item contained in the data.

Abstract translation: 在存储器芯片的访问方法中，特别是对于NAND闪存芯片，存储器访问取决于使用哪种类型的存储器芯片。 在这种情况下，该方法旨在支持各种类型的存储器芯片。 根据本发明的方法，首先从存储芯片读取数据，该存储器芯片包含用于访问存储芯片的存储器芯片典型信息项。 使用包含在数据中的存储芯片典型信息项来执行对存储器芯片的后续访问。

公开(公告)号：US20080189500A1

公开(公告)日：2008-08-07

申请号：US11671141

申请日：2007-02-05

Applicant: Gerard David Jennings ,  Eckhard Delfs

Inventor： Gerard David Jennings ,  Eckhard Delfs

IPC: G06F12/14

CPC classification number: G06F9/3824 ,  G06F21/71

Abstract: Processor arrangement having a first processor, a second processor, and at least one memory configured to be shared by the first processor and the second processor. The second processor has a memory interface configured to provide access to the at least one memory, and a processor communication interface configured to provide a memory access service to the first processor. The first processor has a processor communication interface configured to use the memory access service from the second processor. The first processor and the second processor use at least one cryptographic mechanism in the context of the memory access service.

Abstract translation: 具有第一处理器，第二处理器和配置为由第一处理器和第二处理器共享的至少一个存储器的处理器布置。 第二处理器具有被配置为提供对至少一个存储器的访问的存储器接口，以及被配置为向第一处理器提供存储器访问服务的处理器通信接口。 第一处理器具有被配置为使用来自第二处理器的存储器访问服务的处理器通信接口。 第一处理器和第二处理器在存储器访问服务的上下文中使用至少一个密码机制。

公开(公告)号：US20070110109A1

公开(公告)日：2007-05-17

申请号：US11551518

申请日：2006-10-20

Applicant: Gerard Jennings ,  Eckhard Delfs ,  Uma Ranjan ,  Andreas Siggelkow

Inventor： Gerard Jennings ,  Eckhard Delfs ,  Uma Ranjan ,  Andreas Siggelkow

IPC: H04J3/06

CPC classification number: G06F21/725 ,  G06F21/10

Abstract: A first time indication which can be changed by a user and stored in a first memory. Furthermore, in the case of a change in the first time indication which is performed externally to the checking device, the difference between the stored first time indication and the changed first time indication is determined. Furthermore, it is checked whether a predetermined criterion is met by using a trustworthy second time indication, the first time indication and the difference.

Abstract translation: 可由用户改变并存储在第一存储器中的第一时间指示。 此外，在从检查装置向外部执行的第一次指示的改变的情况下，确定所存储的第一时间指示与改变的第一时间指示之间的差异。 此外，通过使用可靠的第二时间指示，第一时间指示和差异来检查是否满足预定标准。

公开(公告)号：US09244863B2

公开(公告)日：2016-01-26

申请号：US11671146

申请日：2007-02-05

Applicant: Eckhard Delfs

Inventor： Eckhard Delfs

IPC: G06F21/62 ,  G06F12/14 ,  G06F21/72 ,  G06F21/79 ,  G06F21/60

CPC classification number: G06F12/1408 ,  G06F21/60 ,  G06F21/62 ,  G06F21/6209 ,  G06F21/6218 ,  G06F21/72 ,  G06F21/79 ,  G06F2221/2105

Abstract: Computing device with a processing system including a plurality of user sub-systems, a plurality of user sub-system identifiers respectively identifying one user sub-system of the plurality of user sub-systems, a processor configured to run the processing system, a cryptography unit configured to provide at least one cryptographic mechanism, a cryptography unit secret key assigned to the cryptography unit, and a binder configured to bind the cryptography unit secret key to the user sub-system identifier of a currently running user sub-system.

Abstract translation: 具有包括多个用户子系统的处理系统的计算设备，分别标识所述多个用户子系统中的一个用户子系统的多个用户子系统标识符，被配置为运行所述处理系统的处理器，密码学 被配置为提供至少一个密码机制的单元，分配给密码单元的密码单元密钥，以及被配置为将密码单元密钥绑定到当前正在运行的用户子系统的用户子系统标识符的绑定。

公开(公告)号：US08296581B2

公开(公告)日：2012-10-23

申请号：US11671141

申请日：2007-02-05

Applicant: Gerard David Jennings ,  Eckhard Delfs

Inventor： Gerard David Jennings ,  Eckhard Delfs

IPC: G06F12/14 ,  G06F21/02 ,  G06F21/00 ,  G06F13/00

CPC classification number: G06F9/3824 ,  G06F21/71

Abstract: Processor arrangement having a first processor, a second processor, and at least one memory configured to be shared by the first processor and the second processor. The second processor has a memory interface configured to provide access to the at least one memory, and a processor communication interface configured to provide a memory access service to the first processor. The first processor has a processor communication interface configured to use the memory access service from the second processor. The first processor and the second processor use at least one cryptographic mechanism in the context of the memory access service.

Abstract translation: 具有第一处理器，第二处理器和配置为由第一处理器和第二处理器共享的至少一个存储器的处理器布置。 第二处理器具有被配置为提供对至少一个存储器的访问的存储器接口，以及被配置为向第一处理器提供存储器访问服务的处理器通信接口。 第一处理器具有被配置为使用来自第二处理器的存储器访问服务的处理器通信接口。 第一处理器和第二处理器在存储器访问服务的上下文中使用至少一个密码机制。

公开(公告)号：US07379863B2

公开(公告)日：2008-05-27

申请号：US10409961

申请日：2003-04-09

Applicant: Eckhard Delfs ,  Emilian Ertel

Inventor： Eckhard Delfs ,  Emilian Ertel

IPC: G10L21/00 ,  H04Q7/00 ,  H04Q7/20 ,  H04B7/212

CPC classification number: H04W72/087 ,  H04W56/00

Abstract: A method and device within a speech processing unit (SPU) for reducing scheduling delay between the SPU and a radio network node. Within the SPU, data packets are processed in a plurality of time slots that are subunits of frames. The device receives timing information from the node that identifies a beginning and an ending of processing periods in the node. The timing information is utilized to select a time slot within each frame as a target time slot. The target time slot has a position within each frame such that the scheduling delay between the ending of a processing period in the node and the beginning of the target time slot is minimized. Data packets for a particular channel are assigned to the target time slot to reduce the scheduling delay. The phase of the frame is then adjusted by erasing superfluous data packets.

Abstract translation: 用于减少SPU与无线电网络节点之间的调度延迟的语音处理单元（SPU）内的方法和设备。 在SPU内，在作为帧的子单元的多个时隙中处理数据分组。 设备从节点接收标识节点中的处理周期的开始和结束的定时信息。 定时信息用于选择每帧内的时隙作为目标时隙。 目标时隙在每个帧内具有位置，使得节点中的处理周期的结束与目标时隙的开始之间的调度延迟最小化。 将特定信道的数据分组分配给目标时隙以减少调度延迟。 然后通过擦除多余的数据包来调整帧的相位。