公开(公告)号：US4047132A

公开(公告)日：1977-09-06

申请号：US698021

申请日：1976-06-21

Applicant: Ignacy Krajewski

Inventor： Ignacy Krajewski

IPC: H01P3/08 ,  H01P5/02 ,  H05K1/00 ,  H05K1/02 ,  H05K1/11

CPC classification number: H01P3/088 ,  H01P5/02 ,  H05K1/0218 ,  H05K1/0253 ,  H05K1/029 ,  H05K1/116 ,  H05K1/0219 ,  H05K1/0222 ,  H05K1/0237 ,  H05K1/0287 ,  H05K1/0289 ,  H05K1/0298 ,  H05K2201/09381 ,  H05K2201/09772 ,  H05K2201/09781 ,  H05K2201/10689 ,  H05K2203/175

Abstract: The present invention is concerned with multilayer printed circuit boards which have more than a single plane of interconnection conductors spaced away from a common plane, such as an earth or power plane. In such a case the conductors of the interconnection layers form transmission lines having respectively different impedances, depending on their distances from the common plane. The invention contemplates a pattern of conductive areas distributed over one of the surfaces of the multilayer board, the surface chosen lying on the opposite side of the planes of conductors from the common plane, the pattern configuration being chosen more nearly to equalize the impedances of the conductors. The areas of the pattern are preferably connected to the common plane.

Abstract translation: 本发明涉及多层印刷电路板，该多层印刷电路板具有多于一个平面的互连导体，与公共平面（例如地球或电源平面）间隔开。 在这种情况下，互连层的导体根据它们与公共平面的距离而形成具有各自不同阻抗的传输线。 本发明考虑了分布在多层板的一个表面上的导电区域的图案，该表面被选择在与公共平面的导体平面相对的一侧上，该图形配置被选择得更接近于均衡该多层板的阻抗 导体 图案的区域优选地连接到公共平面。