SYSTEM FOR REDUCING LATENCY IN NETWORK DEVICES

    公开(公告)号:US20210006508A1

    公开(公告)日:2021-01-07

    申请号:US16754273

    申请日:2018-10-17

    Inventor: Thomas Dejanovic

    Abstract: In general, the invention relates to a gearbox. The gearbox may include a controller comprising circuity and is configured to make a first determination that an available data amount at a first clock cycle is greater than a required data amount and that no idle Ethernet Block is being processed, wherein the available data amount at the first clock cycle comprises an unaligned data word, based on the first determination, generate a first aligned data word comprising at least a portion of the unaligned data word, and transmit the first aligned data word to a transmit port.

    System for reducing latency in network devices

    公开(公告)号:US11075854B2

    公开(公告)日:2021-07-27

    申请号:US16754273

    申请日:2018-10-17

    Inventor: Thomas Dejanovic

    Abstract: In general, the invention relates to a gearbox. The gearbox may include a controller comprising circuity and is configured to make a first determination that an available data amount at a first clock cycle is greater than a required data amount and that no idle Ethernet Block is being processed, wherein the available data amount at the first clock cycle comprises an unaligned data word, based on the first determination, generate a first aligned data word comprising at least a portion of the unaligned data word, and transmit the first aligned data word to a transmit port.

    APPARATUS AND METHOD FOR LOW LATENCY SWITCHING

    公开(公告)号:US20200244595A1

    公开(公告)日:2020-07-30

    申请号:US16820409

    申请日:2020-03-16

    Abstract: A method of data switching. Data is received by at least one input port of a crosspoint switch. The crosspoint switch configurably casts the data to at least one output port of the crosspoint switch. Each output port of the crosspoint switch is connected to a respective input of a logic function device such as an FPGA. The logic function device applies a logic function to data received from each output port of the crosspoint switch, such as address filtering or multiplexing, and outputs processed data to one or more respective logic function device output interfaces. Also, a method of switching involving circuit switching received data to an output while also copying the data to a higher layer function.

    SYSTEMS FOR TRANSMITTING A DATA STREAM AND METHODS FOR TRANSMITTING A DATA STREAM

    公开(公告)号:US20190268260A1

    公开(公告)日:2019-08-29

    申请号:US16302954

    申请日:2017-05-19

    Inventor: David Snowdon

    Abstract: Disclosed herein is a system (10) for transmitting a data stream (12). The system (10) is configured to receive the data stream (12). The data stream (12) carries a plurality of orders that are destined for a market (24) configured for electronic trading. The system (10) is configured to transmit the data stream (12) carrying the plurality of orders. The system (10) is configured to process at least the plurality of orders (12) to determine trading risk information (14) indicative of trading risk. The system (10) is configured to determine if the trading risk indicated by the trading risk information (14) satisfies a trading risk condition (16). The system (10) is configured to cease transmitting the data stream (12) carrying the plurality of orders if the trading risk condition is determined to be satisfied and commenced transmitting another data stream (18) destined for the electronic market. Also disclosed herein is a method for transmitting a data stream (12).

    APPARATUS AND METHOD FOR LOW LATENCY SWITCHING

    公开(公告)号:US20170111295A1

    公开(公告)日:2017-04-20

    申请号:US15315708

    申请日:2014-12-03

    Abstract: A method of data switching. Data is received at least one input port of a crosspoint switch. The crosspoint switch configurably casts the data to at least one output port of the crosspoint switch. The or each output port of the crosspoint switch is connected to a respective input of a logic function device such as a FPGA. The logic function device applies a logic function to data received from the or each output port of the crosspoint switch, such as address filtering or multiplexing, and outputs processed data to one or more respective logic function device output interfaces. Also, a method of switching involving circuit switching received data to an output while also copying the data to a higher layer function.

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