公开(公告)号：US20120225559A1

公开(公告)日：2012-09-06

申请号：US13411871

申请日：2012-03-05

Applicant: Ricky Alan JACKSON ,  Walter Baker MEINEL ,  Karen Hildegard Ralston KIRMSE

Inventor： Ricky Alan JACKSON ,  Walter Baker MEINEL ,  Karen Hildegard Ralston KIRMSE

IPC: H01L21/302

CPC classification number: B81C1/00047 ,  B81B2203/0315 ,  B81B2203/0353 ,  B81C1/00801 ,  B81C2201/014

Abstract: A process of forming a MEMS device with a device cavity underlapping an overlying dielectric layer stack having an etchable sublayer over an etch-resistant lower portion, including: etching through at least the etchable sublayer of the overlying dielectric layer stack in an access hole to expose a lateral face of the etchable sublayer, covering exposed surfaces of the etchable sublayer by protective material, and subsequently performing a cavity etch. A cavity etch mask may cover the exposed surfaces of the etchable sublayer. Alternatively, protective sidewalls may be formed by an etchback process to cover the exposed surfaces of the etchable sublayer. Alternatively, the exposed lateral face of the etchable sublayer may be recessed by an isotropic etch, than isolated by a reflow operation which causes edges of an access hole etch mask to drop and cover the exposed lateral face of the etchable sublayer.

Abstract translation: 一种形成具有器件空腔的MEMS器件的过程，该器件空腔将覆盖在具有可蚀刻子层的覆盖介质层堆叠覆盖在耐蚀刻下部上，包括：至少蚀刻入口孔中的上覆电介质层堆叠的可蚀刻子层以暴露 可蚀刻子层的侧面，通过保护材料覆盖可蚀刻子层的暴露表面，并随后执行腔蚀刻。 腔蚀刻掩模可以覆盖可蚀刻子层的暴露表面。 或者，可以通过回蚀工艺形成保护侧壁，以覆盖可蚀刻子层的暴露表面。 或者，可蚀刻子层的暴露的侧面可以通过各向同性蚀刻来凹陷，而不是通过回流操作来隔离，这导致访问孔蚀刻掩模的边缘落下并覆盖可蚀刻子层的暴露的侧面。

公开(公告)号：US20120223401A1

公开(公告)日：2012-09-06

申请号：US13411861

申请日：2012-03-05

Applicant: Ricky Alan Jackson ,  Walter Baker Meinel ,  Karen Hildegard Ralston Kirmse

Inventor： Ricky Alan Jackson ,  Walter Baker Meinel ,  Karen Hildegard Ralston Kirmse

IPC: H01L29/84 ,  H01L21/02

CPC classification number: B81C1/00626 ,  B81B2203/0315 ,  B81C99/0065

Abstract: A MEMS device having a device cavity in a substrate has a cavity etch monitor proximate to the device cavity. An overlying layer including dielectric material is formed over the substrate. A monitor scale is formed in or on the overlying layer. Access holes are etched through the overlying layer and a cavity etch process forms the device cavity and a monitor cavity. The monitor scale is located over a lateral edge of the monitor cavity. The cavity etch monitor includes the monitor scale and monitor cavity, which allows visual measurement of a lateral width of the monitor cavity; the lateral dimensions of the monitor cavity being related to lateral dimensions of the device cavity.

Abstract translation: 在衬底中具有器件空腔的MEMS器件具有靠近器件腔的腔蚀刻监测器。 在衬底上形成包括电介质材料的覆盖层。 监视器刻度形成在上层上或上。 通过覆盖层蚀刻通孔，并且腔蚀刻工艺形成器件腔和监测腔。 监视器刻度位于监视器腔的侧边缘上方。 腔蚀刻监视器包括监视器刻度和监视器腔，其允许视觉测量监视器腔的横向宽度; 监视器腔的横向尺寸与装置腔的横向尺寸有关。

公开(公告)号：US08652971B2

公开(公告)日：2014-02-18

申请号：US13411861

申请日：2012-03-05

Applicant: Ricky Alan Jackson ,  Walter Baker Meinel ,  Karen Hildegard Ralston Kirmse

Inventor： Ricky Alan Jackson ,  Walter Baker Meinel ,  Karen Hildegard Ralston Kirmse

IPC: H01L21/461 ,  H01L23/544

CPC classification number: B81C1/00626 ,  B81B2203/0315 ,  B81C99/0065

Abstract: A MEMS device having a device cavity in a substrate has a cavity etch monitor proximate to the device cavity. An overlying layer including dielectric material is formed over the substrate. A monitor scale is formed in or on the overlying layer. Access holes are etched through the overlying layer and a cavity etch process forms the device cavity and a monitor cavity. The monitor scale is located over a lateral edge of the monitor cavity. The cavity etch monitor includes the monitor scale and monitor cavity, which allows visual measurement of a lateral width of the monitor cavity; the lateral dimensions of the monitor cavity being related to lateral dimensions of the device cavity.

Abstract translation: 在衬底中具有器件空腔的MEMS器件具有靠近器件腔的腔蚀刻监测器。 在衬底上形成包括电介质材料的覆盖层。 监视器刻度形成在上层上或上。 通过覆盖层蚀刻通孔，并且腔蚀刻工艺形成器件腔和监测腔。 监视器刻度位于监视器腔的侧边缘上方。 腔蚀刻监视器包括监视器刻度和监视器腔，其允许视觉测量监视器腔的横向宽度; 监视器腔的横向尺寸与装置腔的横向尺寸有关。

公开(公告)号：US10526198B2

公开(公告)日：2020-01-07

申请号：US13411849

申请日：2012-03-05

Applicant: Ricky Alan Jackson ,  Walter Baker Meinel ,  Kalin Valeriev Lazarov ,  Brian E. Goodlin

Inventor： Ricky Alan Jackson ,  Walter Baker Meinel ,  Kalin Valeriev Lazarov ,  Brian E. Goodlin

IPC: B81B7/00 ,  H01L27/144 ,  B81C1/00

Abstract: A MEMS IR sensor, with a cavity in a substrate underlapping an overlying layer and a temperature sensing component disposed in the overlying layer over the cavity, may be formed by forming an IR-absorbing sealing layer on the overlying layer so as to cover access holes to the cavity. The sealing layer is may include a photosensitive material, and the sealing layer may be patterned using a photolithographic process to form an IR-absorbing seal. Alternately, the sealing layer may be patterned using a mask and etch process to form the IR-absorbing seal.

公开(公告)号：US08642370B2

公开(公告)日：2014-02-04

申请号：US13411871

申请日：2012-03-05

Applicant: Ricky Alan Jackson ,  Karen Hildegard Ralston Kirmse ,  Kandis Meinel

Inventor： Ricky Alan Jackson ,  Walter Baker Meinel ,  Karen Hildegard Ralston Kirmse ,  Kandis Meinel

IPC: H01L21/00

CPC classification number: B81C1/00047 ,  B81B2203/0315 ,  B81B2203/0353 ,  B81C1/00801 ,  B81C2201/014

Abstract: A process of forming a MEMS device with a device cavity underlapping an overlying dielectric layer stack having an etchable sublayer over an etch-resistant lower portion, including: etching through at least the etchable sublayer of the overlying dielectric layer stack in an access hole to expose a lateral face of the etchable sublayer, covering exposed surfaces of the etchable sublayer by protective material, and subsequently performing a cavity etch. A cavity etch mask may cover the exposed surfaces of the etchable sublayer. Alternatively, protective sidewalls may be formed by an etchback process to cover the exposed surfaces of the etchable sublayer. Alternatively, the exposed lateral face of the etchable sublayer may be recessed by an isotropic etch, than isolated by a reflow operation which causes edges of an access hole etch mask to drop and cover the exposed lateral face of the etchable sublayer.

Abstract translation: 一种形成具有器件空腔的MEMS器件的过程，该器件空腔将覆盖在具有可蚀刻子层的覆盖介质层堆叠覆盖在耐蚀刻下部上，包括：至少蚀刻入口孔中的上覆电介质层堆叠的可蚀刻子层以暴露 可蚀刻子层的侧面，通过保护材料覆盖可蚀刻子层的暴露表面，并随后执行腔蚀刻。 腔蚀刻掩模可以覆盖可蚀刻子层的暴露表面。 或者，可以通过回蚀工艺形成保护侧壁，以覆盖可蚀刻子层的暴露表面。 或者，可蚀刻子层的暴露的侧面可以通过各向同性蚀刻来凹陷，而不是通过回流操作来隔离，这导致访问孔蚀刻掩模的边缘落下并覆盖可蚀刻子层的暴露的侧面。

公开(公告)号：US20120223400A1

公开(公告)日：2012-09-06

申请号：US13411849

申请日：2012-03-05

Applicant: Ricky Alan JACKSON ,  Walter Baker MEINEL ,  Kalin Valeriev LAZAROV ,  Brian E. GOODLIN

Inventor： Ricky Alan JACKSON ,  Walter Baker MEINEL ,  Kalin Valeriev LAZAROV ,  Brian E. GOODLIN

IPC: H01L29/84 ,  H01L21/02

CPC classification number: B81B7/0019 ,  B81B2201/014 ,  B81C1/0038 ,  B81C1/00523 ,  B81C1/0069 ,  B81C1/00801 ,  H01L27/144

Abstract: A MEMS IR sensor, with a cavity in a substrate underlapping an overlying layer and a temperature sensing component disposed in the overlying layer over the cavity, may be formed by forming an IR-absorbing sealing layer on the overlying layer so as to cover access holes to the cavity. The sealing layer is may include a photosensitive material, and the sealing layer may be patterned using a photolithographic process to form an IR-absorbing seal. Alternately, the sealing layer may be patterned using a mask and etch process to form the IR-absorbing seal.

Abstract translation: 可以通过在覆盖层上形成IR吸收密封层来形成MEMS IR传感器，该MEMS红外传感器在衬底上覆盖覆盖层的空腔和设置在空腔上的上覆层中的温度感测部件，以便覆盖通路孔 到空腔。 密封层可以包括感光材料，并且可以使用光刻工艺对密封层进行图案化以形成IR吸收密封。 或者，可以使用掩模和蚀刻工艺对密封层进行图案化以形成IR吸收密封。