Abstract:
In accordance with embodiments of the present disclosure, a method may comprise identifying one or more portions of the memory having defects. The method may also include storing one or more addresses in the memory defect list, each of the one or more addresses associated with a portion of the one or more identified portions. The method may further include indicating to components of an information handling system that the one or more identified portions are unusable such that the other components are prevented from allocating and using the one or more identified portions.
Abstract:
A method is provided for identifying in a computer system physical memory modules having failing or defective addresses. The transparent error correction function of the computer system is disabled and system memory is tested. If an error is detected, a coded data value that indicative of a single-bit error is written to the failing or defective memory address. The failing or defective memory address is read in and the incorrect data value in the memory address is detected. The address of the failing of defective memory address is recorded and mapped or correlated to a physical memory module.
Abstract:
In accordance with embodiments of the present disclosure, a method may comprise identifying one or more portions of the memory having defects. The method may also include storing one or more addresses in the memory defect list, each of the one or more addresses associated with a portion of the one or more identified portions. The method may further include indicating to components of an information handling system that the one or more identified portions are unusable such that the other components are prevented from allocating and using the one or more identified portions.