公开(公告)号：US20130108182A1

公开(公告)日：2013-05-02

申请号：US13808076

申请日：2011-07-04

Applicant: Chung Ku Yie ,  Min Sung Kim ,  Ul Ho Lee

Inventor： Chung Ku Yie ,  Min Sung Kim ,  Ul Ho Lee

IPC: G06T9/00

CPC classification number: G06T9/004 ,  H04N19/107 ,  H04N19/11 ,  H04N19/119 ,  H04N19/14 ,  H04N19/176 ,  H04N19/44 ,  H04N19/45 ,  H04N19/46 ,  H04N19/523 ,  H04N19/547 ,  H04N19/593 ,  H04N19/91 ,  H04N19/94

Abstract: A method of decoding an image includes the steps of restoring a residual value by performing inverse quantization and inverse transform on the residual value by entropy decoding a received bit stream, generating a prediction unit by performing intra prediction selectively using one of a plurality of prediction modes on a prediction unit split by conducting at least one of asymmetric partitioning and geometrical partitioning, and restoring an image by adding the residual value to the prediction unit. It may be possible to enhance encoding efficiency of high-resolution images having a resolution of HD or higher by performing intra prediction on the asymmetric partitioning and/or geometrical partitioning.

Abstract translation: 解码图像的方法包括以下步骤：通过对接收到的比特流进行熵解码对剩余值执行逆量化和逆变换来恢复残差值，通过使用多个预测模式之一选择性地执行帧内预测来生成预测单元 通过进行非对称分割和几何划分中的至少一个来分割的预测单元，以及通过将所述剩余值添加到所述预测单元来恢复图像。 可以通过对非对称分区和/或几何划分执行帧内预测来提高具有HD或更高分辨率的高分辨率图像的编码效率。

公开(公告)号：US08376802B2

公开(公告)日：2013-02-19

申请号：US13103009

申请日：2011-05-06

Applicant: Keum-Nam Kim ,  Ul-Ho Lee

Inventor： Keum-Nam Kim ,  Ul-Ho Lee

IPC: H01J9/24

CPC classification number: H01L51/5203 ,  H01L27/326

Abstract: An electroluminescent display device includes a display panel having scan lines, data lines, and pixel circuits. The pixel circuit includes an electroluminescent element having a first electrode layer, a first insulation film, and an emitting layer for displaying images. A driving circuit is coupled to the electroluminescent element. The first electrode layer is superimposed on a power source line, a scan line, or both, with a second insulation film therebetween.

Abstract translation: 电致发光显示装置包括具有扫描线，数据线和像素电路的显示面板。 像素电路包括具有第一电极层，第一绝缘膜和用于显示图像的发光层的电致发光元件。 驱动电路耦合到电致发光元件。 第一电极层叠加在电源线，扫描线或两者上，其间具有第二绝缘膜。

公开(公告)号：US08350267B2

公开(公告)日：2013-01-08

申请号：US12104749

申请日：2008-04-17

Applicant: Jae-Bon Koo ,  Ji-Yong Park ,  Sang-Il Park ,  Ki-Yong Lee ,  Ul-Ho Lee

Inventor： Jae-Bon Koo ,  Ji-Yong Park ,  Sang-Il Park ,  Ki-Yong Lee ,  Ul-Ho Lee

IPC: H01L27/14

CPC classification number: G09G3/3275 ,  H01L27/1214 ,  H01L29/78621 ,  H01L29/78624 ,  H01L29/78645 ,  H01L29/78672 ,  H01L29/78696

Abstract: A high-speed flat panel display has thin film transistors in a pixel array portion in which a plurality of pixels are arranged and a driving circuit portion for driving the pixels of the pixel array portion, which have different resistance values than each other or have different geometric structures than each other. The flat panel display comprises a pixel array portion where a plurality of pixels are arranged, and a driving circuit portion for driving the pixels of the pixel array portion. The thin film transistors in the pixel array portion and the driving circuit portion have different resistance values in their gate regions or drain regions than each other, or have different geometric structures than each other. One thin film transistor has a zigzag shape in its gate region or drain region or has an offset region.

Abstract translation: 高速平板显示器在其中排列有多个像素的像素阵列部分中具有薄膜晶体管，以及用于驱动像素阵列部分的像素的驱动电路部分，其具有彼此不同的电阻值或具有不同的像素阵列部分 几何结构比彼此。 平板显示器包括其中布置有多个像素的像素阵列部分和用于驱动像素阵列部分的像素的驱动电路部分。 像素阵列部分和驱动电路部分中的薄膜晶体管在其栅极区域或漏极区域中具有彼此不同的电阻值，或者具有彼此不同的几何结构。 一个薄膜晶体管在其栅极区域或漏极区域中具有锯齿形状或具有偏移区域。

公开(公告)号：US20120301040A1

公开(公告)日：2012-11-29

申请号：US13576598

申请日：2011-01-25

Applicant: Alex Chungku Yie ,  Joon Seong Park ,  Ul-Ho Lee

Inventor： Alex Chungku Yie ,  Joon Seong Park ,  Ul-Ho Lee

IPC: G06K9/36

CPC classification number: H04N19/122 ,  H04N19/147 ,  H04N19/176

Abstract: Disclosed are an image encoding/decoding method for rate-distortion optimization and an apparatus for performing the same. A macro block to be encoded is provided, any one of inter-frame prediction and intra-frame prediction is executed to generate a predictive macro block, a residual prediction block is generated on the basis of the generated predictive macro block and the provided macro block, and then the generated residual prediction block is transformed by applying a transform matrix having the highest encoding efficiency among a plurality of predetermined transform matrixes to the generated residual prediction block. Accordingly, it is possible to optimize the rate-distortion, and thus to enhance the quality of an image.

Abstract translation: 公开了一种用于速率失真优化的图像编码/解码方法及其执行装置。 提供要编码的宏块，执行帧间预测和帧内预测中的任何一个以生成预测宏块，基于所生成的预测宏块和所提供的宏块产生残差预测块 ，然后通过将多个预定变换矩阵中具有最高编码效率的变换矩阵应用于所生成的残差预测块来变换生成的残差预测块。 因此，可以优化速率失真，从而提高图像的质量。

公开(公告)号：US08049220B2

公开(公告)日：2011-11-01

申请号：US11942460

申请日：2007-11-19

Applicant: Ji-Yong Park ,  Ul-Ho Lee ,  Jae-Bon Koo ,  Ki-Yong Lee ,  Hye-Hyang Park

Inventor： Ji-Yong Park ,  Ul-Ho Lee ,  Jae-Bon Koo ,  Ki-Yong Lee ,  Hye-Hyang Park

IPC: H01L27/14

CPC classification number: H01L29/78696 ,  G02F1/13454 ,  H01L27/1285 ,  H01L27/1296 ,  H01L29/04 ,  H01L29/66757 ,  H01L29/78675

Abstract: The present invention relates to a flat panel display device comprising a polycrystalline silicon thin film transistor and provides a flat panel display device having improved characteristics by having a different number of grain boundaries included in polycrystalline silicon thin film formed in active channel regions of a driving circuit portion and active channel regions of pixel portion. This may be achieved by having a different number of grain boundaries included in the polycrystalline silicon thin film formed in active channel regions of a switching thin film transistor and a driving thin film transistor formed in the pixel portion, and by having a different number of grain boundaries included in polycrystalline silicon thin film formed in active channel regions of a thin film transistor for driving the pixel portion for each red, green and blue of the pixel portion. Further, this may be achieved by having a different number of grain boundaries included in polycrystalline silicon formed in active channel regions of an NMOS thin film transistor and a PMOS thin film transistor for forming CMOS transistor used in flat panel display device, thereby constructing a thin film transistor to obtain the improved characteristics for each transistor.

Abstract translation: 本发明涉及一种包括多晶硅薄膜晶体管的平板显示装置，通过在驱动电路的有源沟道区域中形成的多晶硅薄膜中包含不同数量的晶界，提供具有改进特性的平板显示装置 像素部分和有源沟道区域。 这可以通过在形成在像素部分中的开关薄膜晶体管和驱动薄膜晶体管的有源沟道区域中形成的多晶硅薄膜中包含不同数量的晶界，并且通过具有不同数量的晶粒来实现 包括在形成在用于驱动像素部分的每个红，绿和蓝的像素部分的薄膜晶体管的有源沟道区域中的多晶硅薄膜中的边界。 此外，这可以通过在NMOS薄膜晶体管的有源沟道区域中形成的多晶硅中包含不同数量的晶界和用于形成用于平板显示器件的CMOS晶体管的PMOS薄膜晶体管来实现，从而构造薄的 以获得每个晶体管的改进特性。

公开(公告)号：US07385223B2

公开(公告)日：2008-06-10

申请号：US10754543

申请日：2004-01-12

Applicant: Jae-Bon Koo ,  Ji-Yong Park ,  Hye-Hyang Park ,  Ki-Yong Lee ,  Ul-Ho Lee

Inventor： Jae-Bon Koo ,  Ji-Yong Park ,  Hye-Hyang Park ,  Ki-Yong Lee ,  Ul-Ho Lee

IPC: H01L31/036

CPC classification number: H01L21/02675 ,  G02F1/1368 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/2026 ,  H01L27/1229 ,  H01L27/1233 ,  H01L27/1285 ,  H01L27/1296 ,  H01L27/3297 ,  H01L29/04 ,  H01L29/0684 ,  H01L29/78696

Abstract: A flat panel display is provided. The flat panel display includes a light emitting device and two or more thin film transistors (TFTs) having semiconductor active layers having channel regions, where the thickness of the channel regions of the TFTs are different from each other. Thus, higher switching properties of a switching TFT can be maintained, a more uniform brightness of a driving TFT can be satisfied, and a white balance can be satisfied without changing a size of the TFT active layer.

Abstract translation: 提供平板显示器。 平板显示器包括发光器件和具有沟道区的半导体有源层的两个或多个薄膜晶体管（TFT），其中TFT的沟道区的厚度彼此不同。 因此，可以保持开关TFT的更高的开关特性，可以满足驱动TFT的更均匀的亮度，并且可以在不改变TFT有源层的尺寸的情况下实现白平衡。

公开(公告)号：US07285902B2

公开(公告)日：2007-10-23

申请号：US10815792

申请日：2004-04-02

Applicant: Jae-Bon Koo ,  Sang-Il Park ,  Ul-Ho Lee ,  Jin-Soo Kim ,  Jin-Woung Jung ,  Chang-Gyu Lee

Inventor： Jae-Bon Koo ,  Sang-Il Park ,  Ul-Ho Lee ,  Jin-Soo Kim ,  Jin-Woung Jung ,  Chang-Gyu Lee

IPC: H01J1/62 ,  H01J63/04

CPC classification number: H01L27/1222 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/3216 ,  H01L27/3218 ,  H01L27/3262 ,  H01L29/78624

Abstract: Disclosed is a flat panel display capable of enhancing a white balance by making a doping concentration or shape and size of drain offset regions of driving transistors different, in R, G and B unit pixels of each pixel. A flat panel display, comprises a plurality of pixels, where each of pixels including R, G and B unit pixels to embody red (R), green (G) and blue (B) colors, respectively. Each of the unit pixels includes a transistor with source/drain regions. Transistors of at least two unit pixels of the R, G and B unit pixels have drain regions of different geometric structures. In each unit pixel, a resistance value of the drain region of the transistor to drive a light-emitting device having the highest luminous efficiency among the transistors is higher than that of the drain region of a transistor to drive the light-emitting device having a relatively low luminous efficiency.

Abstract translation: 公开了一种平板显示器，其能够通过在每个像素的R，G和B单位像素中使驱动晶体管的漏极偏移区域的掺杂浓度或形状和尺寸不同而增强白平衡。 平板显示器包括多个像素，其中包括R，G和B单位像素的每个像素分别体现为红色（R），绿色（G）和蓝色（B）颜色。 每个单位像素包括具有源极/漏极区域的晶体管。 R，G和B单元像素的至少两个单位像素的晶体管具有不同几何结构的漏极区域。 在每个单位像素中，用于驱动晶体管中具有最高发光效率的发光器件的晶体管的漏极区域的电阻值高于晶体管的漏极区域的电阻值，以驱动具有 发光效率相对较低。

公开(公告)号：US20070138504A1

公开(公告)日：2007-06-21

申请号：US11707975

申请日：2007-02-15

Applicant: Keum-Nam Kim ,  Ul-Ho Lee

Inventor： Keum-Nam Kim ,  Ul-Ho Lee

IPC: H01L31/00

CPC classification number: H01L21/76895 ,  G09G3/3233 ,  G09G3/3241 ,  G09G2300/0819 ,  G09G2300/0842

Abstract: A method for manufacturing a diode-connected transistor includes forming a silicon layer on a substrate, a first insulation film on the silicon layer, and a gate electrode on the first insulation film. The method also includes forming a source region, a channel region, and a drain region in the silicon layer and forming a second insulation film on the gate electrode. A source electrode and a drain electrode are formed on the second insulation film and are coupled to the source region and the drain region, respectively. The method further includes coupling the drain electrode to the gate electrode through a contact hole that is vertically above the channel region.

Abstract translation: 一种二极管连接晶体管的制造方法，包括在基板上形成硅层，在硅层上形成第一绝缘膜，在第一绝缘膜上形成栅电极。 该方法还包括在硅层中形成源极区，沟道区和漏极区，并在栅电极上形成第二绝缘膜。 源电极和漏极形成在第二绝缘膜上，分别耦合到源极区和漏极区。 该方法还包括通过垂直于沟道区上方的接触孔将漏电极耦合到栅电极。

公开(公告)号：US07109982B2

公开(公告)日：2006-09-19

申请号：US10952894

申请日：2004-09-28

Applicant: Keum-Nam Kim ,  Ul-Ho Lee

Inventor： Keum-Nam Kim ,  Ul-Ho Lee

IPC: G09G3/30

CPC classification number: G09G3/3233 ,  G09G3/3291 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/0251 ,  G09G2310/0262 ,  G09G2320/0238

Abstract: An organic electroluminescent (EL) display panel which includes a pixel circuit is provided. The pixel circuit includes a first transistor, a second transistor, and a display element. The first transistor has control and main electrodes and outputs a current which corresponds to a voltage charged in at least one capacitor being provided between the control and main electrodes. The second transistor has a second control electrode coupled to the control electrode of the first transistor. The second electrode is diode-connected. The display element displays image data corresponding to an amount of the current output by the first transistor. The first transistor and the display element are electrically decoupled during the first period for applying a pre-charge voltage to the control electrode of the first transistor and the second period for applying the data voltage to the control electrode of the first transistor.

Abstract translation: 提供了包括像素电路的有机电致发光（EL）显示面板。 像素电路包括第一晶体管，第二晶体管和显示元件。 第一晶体管具有控制和主电极，并且输出对应于设置在控制电极和主电极之间的至少一个电容器中充电的电压的电流。 第二晶体管具有耦合到第一晶体管的控制电极的第二控制电极。 第二电极是二极管连接的。 显示元件显示与第一晶体管输出的电流量对应的图像数据。 第一晶体管和显示元件在用于将预充电电压施加到第一晶体管的控制电极的第一周期和用于将数据电压施加到第一晶体管的控制电极的第二周期中电去耦合。

公开(公告)号：US20050012100A1

公开(公告)日：2005-01-20

申请号：US10823713

申请日：2004-04-14

Applicant: Jae-Bon Koo ,  Ji-Yong Park ,  Sang-Il Park ,  Ki-Yong Lee ,  Ul-Ho Lee

Inventor： Jae-Bon Koo ,  Ji-Yong Park ,  Sang-Il Park ,  Ki-Yong Lee ,  Ul-Ho Lee

IPC: H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786 ,  H01L31/036 ,  H01L29/04 ,  G02F1/133

CPC classification number: G09G3/3275 ,  H01L27/1214 ,  H01L29/78621 ,  H01L29/78624 ,  H01L29/78645 ,  H01L29/78672 ,  H01L29/78696

Abstract: The present invention discloses a high-speed flat panel display with a long lifetime, wherein thin film transistors in a pixel array portion in which a plurality of pixels are arranged and a driving circuit portion for driving the pixels of the pixel array portion, have different resistance values than each other or have different geometric structures than each other. The flat panel display comprises a pixel array portion where a plurality of pixels are arranged, and a driving circuit portion for driving the pixels of the pixel array portion. The thin film transistors in the pixel array portion and the driving circuit portion have different resistance values in their gate regions or drain regions than each other, or have different geometric structures than each other. One of the thin film transistors in the pixel array portion and the thin film transistors in the driving circuit has zigzag shape in its gate region or drain region or has an offset region.

Abstract translation: 本发明公开了一种寿命长的高速平板显示器，其中排列有多个像素的像素阵列部分中的薄膜晶体管和用于驱动像素阵列部分的像素的驱动电路部分具有不同的 电阻值彼此相差或具有彼此不同的几何结构。 平板显示器包括其中布置有多个像素的像素阵列部分和用于驱动像素阵列部分的像素的驱动电路部分。 像素阵列部分和驱动电路部分中的薄膜晶体管在其栅极区域或漏极区域中具有彼此不同的电阻值，或者具有彼此不同的几何结构。 像素阵列部分中的薄膜晶体管之一和驱动电路中的薄膜晶体管在其栅极区域或漏极区域中具有锯齿形状或具有偏移区域。