Method for damascene formation using plug materials having varied etching rates
    1.
    发明授权
    Method for damascene formation using plug materials having varied etching rates 有权
    使用具有不同蚀刻速率的塞子材料形成镶嵌材料的方法

    公开(公告)号:US07135406B2

    公开(公告)日:2006-11-14

    申请号:US10983681

    申请日:2004-11-09

    CPC classification number: H01L21/76808

    Abstract: Methods for forming openings in damascene structures, such as dual damascene structures are provided, using plug materials having varied etching rates. In one embodiment, a semiconductor substrate is provided with a low-k material layer formed thereabove, the low-k material layer having an upper surface and at least one via opening formed therethrough. A first plug material layer is formed over the low-k material layer and filled in the via opening, the first plug material layer having a first etching rate. The first plug material layer is etched back to form a first plug partially filling the via opening. A second plug material layer is formed over the low-k material layer and the first plug. The second plug material layer is etched back to form a second plug partially below the upper surface of the low-k material layer, the second plug material layer having a second etching rate higher than the first etching rate.

    Abstract translation: 提供了在镶嵌结构中形成开口的方法,例如双镶嵌结构,使用具有不同蚀刻速率的塞子材料。 在一个实施例中,半导体衬底设置有形成在其上的低k材料层,低k材料层具有上表面和至少一个通孔形成。 第一插塞材料层形成在低k材料层上并填充在通孔中,第一插塞材料层具有第一蚀刻速率。 将第一插塞材料层回蚀刻以形成部分填充通孔开口的第一插头。 在低k材料层和第一插塞上形成第二插塞材料层。 第二插塞材料层被回蚀刻以在低k材料层的上表面部分下方形成第二插头,第二插塞材料层具有高于第一蚀刻速率的第二蚀刻速率。

    Method for damascene formation using plug materials having varied etching rates

    公开(公告)号:US20060099787A1

    公开(公告)日:2006-05-11

    申请号:US10983681

    申请日:2004-11-09

    CPC classification number: H01L21/76808

    Abstract: Methods for forming openings in damascene structures, such as dual damascene structures are provided, using plug materials having varied etching rates. In one embodiment, a semiconductor substrate is provided with a low-k material layer formed thereabove, the low-k material layer having an upper surface and at least one via opening formed therethrough. A first plug material layer is formed over the low-k material layer and filled in the via opening, the first plug material layer having a first etching rate. The first plug material layer is etched back to form a first plug partially filling the via opening. A second plug material layer is formed over the low-k material layer and the first plug. The second plug material layer is etched back to form a second plug partially below the upper surface of the low-k material layer, the second plug material layer having a second etching rate higher than the first etching rate.

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