公开(公告)号：US20020018176A1

公开(公告)日：2002-02-14

申请号：US09805039

申请日：2001-03-14

Applicant: ADVANCED DISPLAY INC.

Inventor： Kazuhiro Kobayashi ,  Nobuhiro Nakamura ,  Kazunori Inoue ,  Takuji Yoshida ,  Ken Nakashima ,  Yuichi Masutani ,  Hironori Aoki

IPC: G02F001/13

CPC classification number: G02F1/13458 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136236

Abstract: The present invention is a thin film transistor array substrate includes: an insulating substrate; a first metallic pattern formed on said insulting substrate; an insulating film provided on said first metallic pattern; a semiconductor pattern provided on said insulating film; and a second metallic pattern provided on said semiconductor pattern; wherein said second metallic pattern is surrounded by said semiconductor pattern.

Abstract translation: 本发明是一种薄膜晶体管阵列基板，包括：绝缘基板; 形成在所述绝缘基板上的第一金属图案; 设置在所述第一金属图案上的绝缘膜; 设置在所述绝缘膜上的半导体图案; 以及设置在所述半导体图案上的第二金属图案; 其中所述第二金属图案被所述半导体图案包围。

公开(公告)号：US20030178628A1

公开(公告)日：2003-09-25

申请号：US10237025

申请日：2002-09-09

Applicant: ADVANCED DISPLAY INC.

Inventor： Hironori Aoki ,  Shigeaki Noumi ,  Takafumi Hashiguchi

IPC: H01L027/15 ,  H01L031/12

CPC classification number: G02F1/136209

Abstract: A display apparatus according to the present invention is provided with a gate line 2 formed on an insulating substrate, a source line 13 intersecting with the gate line 2 with an insulating film in between, a source electrode 6 connected to the source line 13, a drain electrode 10 connected to a pixel electrode 9, a semiconductor layer 4 formed below the source electrode 6, the source line 13, and the drain electrode 10, a light-shielding pattern 12 configured below the semiconductor layer 4 lying below the source line 13, and a backlight emitting lights from a light source to the surface of the insulating substrate opposite to where pixels are formed. In this configuration, leakage current arisen in the semiconductor layer lying below the source line, the extending pattern of the drain electrode, and so on can be suppressed.

Abstract translation: 根据本发明的显示装置设置有形成在绝缘基板上的栅极线2，与栅极线2相交的源极线13，其间具有绝缘膜，连接到源极线13的源电极6， 连接到像素电极9的漏电极10，形成在源电极6下面的半导体层4，源极线13和漏电极10，配置在源极线13下方的半导体层4下方的遮光图案12 以及从光源发射到与形成像素的绝缘基板的表面相反的光的背光。 在该结构中，可以抑制位于源极线下方的半导体层，漏电极的延伸图案等的漏电流。

公开(公告)号：US20030076289A1

公开(公告)日：2003-04-24

申请号：US10307434

申请日：2002-12-02

Applicant: ADVANCED DISPLAY INC.

Inventor： Susumu Tokonami ,  Susumu Shibata ,  Hironori Aoki ,  Shingo Nagano

IPC: G09G003/36

CPC classification number: G09G3/3614 ,  G09G3/3655 ,  G09G3/3659 ,  G09G2320/0233

Abstract: The present invention is directed to a liquid crystal display apparatus including: a timing circuit for operating a shift register within a timing circuit during a vertical blanking period such that a common signal that has been alternated at a cycle of a Single Horizontal period is applied on counter electrodes during the vertical blanking period and such that a storage electrode signal is applied on storage electrodes having a frequency, phase and amplitude identical to those of the common signal.