公开(公告)号：US09294112B1

公开(公告)日：2016-03-22

申请号：US14540515

申请日：2014-11-13

Applicant: ANALOG DEVICES, INC.

Inventor： Siddharth Devarajan ,  Lawrence A. Singer ,  Prawal Man Shrestha ,  Pingli Huang

IPC: H03M1/12 ,  H03M1/06 ,  H03M1/08 ,  H03M1/00

CPC classification number: H03M1/121 ,  H03M1/00 ,  H03M1/0604 ,  H03M1/0607 ,  H03M1/0609 ,  H03M1/0612 ,  H03M1/066 ,  H03M1/0836 ,  H03M1/1033 ,  H03M1/12 ,  H03M1/1215 ,  H03M1/124

Abstract: A time-interleaved analog-to-digital converter (ADC) uses M sub-analog-to-digital converters (sub-ADCs) to, according to a sequence, sample an analog input signal to produce digital outputs. When the M sub-ADCs are interleaved, the digital outputs exhibit mismatch errors between the M sub-ADCs due to mismatches between the sub-ADCs. A more second order subtle effect is that the mismatch error for a particular digital output from a particular ADC, due to internal coupling or other such interaction and effects between the M sub-ADCs, can vary depending on which sub-ADC(s) were used before and/or after the particular sub-ADC. If M sub-ADCs are time-interleaved randomly, the mismatches between the M sub-ADCs become a function of the sub-ADC selection pattern in the sequence. The present disclosure describes mechanisms for measuring and reducing these order-dependent mismatches to achieve high dynamic range performance in the time-interleaved ADC.

Abstract translation: 时间交织的模数转换器（ADC）使用M个子模数转换器（sub-ADC），根据一个序列对模拟输入信号进行采样以产生数字输出。 当M个子ADC被交错时，由于子ADC之间的不匹配，数字输出在M个子ADC之间表现出失配误差。 更多的二阶微妙效应是，由于内部耦合或其他此类相互作用和M子ADC之间的影响，来自特定ADC的特定数字输出的失配误差可以根据哪些子ADC 在特定子ADC之前和之后使用。 如果M个子ADC随机进行时间交织，那么M个子ADC之间的失配成为序列中子ADC选择模式的函数。 本公开描述了用于测量和减少这些依赖于顺序的失配以在时间交织的ADC中实现高动态范围性能的机制。