公开(公告)号：US09667256B2

公开(公告)日：2017-05-30

申请号：US14771570

申请日：2014-03-03

Applicant: ATONARP INC.

Inventor： Tomoyoshi Sato

IPC: H03K19/177 ,  G11C7/22 ,  H03K19/173

CPC classification number: H03K19/1776 ,  G11C7/22 ,  H03K19/173 ,  H03K19/17728 ,  H03K19/17736 ,  H03K19/17744

Abstract: A data processing device includes a data processing unit including a plurality of elements and wiring groups that connect the plurality of elements, wherein respective elements in the plurality of elements include: a logic element; an acquisition unit that switches on and off an input side of the logic element for any wire out of the wiring groups on a cycle-by-cycle basis to latch input data; and a post unit that switches on and off an output side of the logic element for any wire out of the wiring groups on a cycle-by-cycle basis, and the data processing unit also includes a timing control unit that controls logic executed by the logic element and functions of the acquisition unit and the post unit on a cycle-by-cycle basis.