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公开(公告)号：US09343178B2
公开(公告)日：2016-05-17
申请号：US14454729
申请日：2014-08-08
Applicant: AU Optronics Corp.
Inventor： Pin-Yu Chan , Chia-En Wu , Kai-Wei Hong , Li-Wei Liu , Yung-Chih Chen
CPC classification number: G11C19/28 , G09G2310/0267 , G09G2310/0286 , H03K17/161
Abstract: A gate driver has a plurality of shift registers. Each of the shift registers has at least three input terminals, two signal input terminals, a pull-up circuit, a driving circuit, a stability pull-down control circuit, and a stability pull-down circuit. The three input terminals of each shift register receive three different clock signals. Accordingly, the driving circuit and the stability pull-down control circuit of each shift register are controlled according to the three clock signals, such that a glitch causing by the coupling effect of the parasitic capacitor of the driving circuit is avoided and the stability of the gate driver is improved.
Abstract translation: 门驱动器具有多个移位寄存器。 每个移位寄存器具有至少三个输入端子，两个信号输入端子，上拉电路，驱动电路，稳定性下拉控制电路和稳定性下拉电路。 每个移位寄存器的三个输入端子接收三个不同的时钟信号。 因此，根据三个时钟信号来控制各个移位寄存器的驱动电路和稳定下拉控制电路，从而避免了由驱动电路的寄生电容器的耦合效应引起的毛刺，并且稳定性 门驱动程序得到改进。
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公开(公告)号：US09620078B2
公开(公告)日：2017-04-11
申请号：US14861251
申请日：2015-09-22
Applicant: AU OPTRONICS CORP.
Inventor： Kai-Wei Hong , Hsiang-Sheng Chang , Yung-Chih Chen , Chun-Da Tu , Cheng-Han Huang , Chuang-Cheng Yang
CPC classification number: G09G5/003 , G06F3/041 , G06F3/0412 , G06F3/0416 , G09G2310/0286 , G09G2310/0294 , G09G2310/062 , G11C19/184 , G11C19/28
Abstract: A touch display apparatus includes a touch driver and a display driver. The touch driver outputs touch signals to drive a touch panel. The display driver outputs scan signals to drive a display panel. A display driver has a plurality of shift registers, and each of the plurality of shift registers includes a pull-up unit, a driving unit, a pull-down unit and a holding unit. The pull-up unit is electrically connected to a driving node for outputting a driving voltage. The driving unit is electrically connected to the driving node for outputting a first scan signal according to a clock. A pull-down unit is electrically connected to the driving node and the output terminal, for pulling down the voltage level of the driving voltage and the first scan signal, respectively. The holding unit is electrically connected to the driving node.
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公开(公告)号：US09424949B2
公开(公告)日：2016-08-23
申请号：US14481183
申请日：2014-09-09
Applicant: AU OPTRONICS CORP.
Inventor： Kai-Wei Hong , Pin-Yu Chan , Yung-Chih Chen , Li-Wei Liu
CPC classification number: G11C19/28 , G09G2310/0286 , G11C19/186
Abstract: A shift register circuit includes a first transistor, a capacitor, a pull-up control circuit, a first pull-down circuit, a pull-down control circuit, a second pull-down circuit and a compensation circuit. The compensation circuit further includes a second transistor, a third transistor, a fourth transistor, a fifth transistor and a sixth transistor. The second transistor, the third transistor, the fourth transistor, and the fifth transistor are corporately used to output a compensation pulse; and the sixth transistor is used to output the compensation pulse to a gate terminal of the first transistor thereby compensating a control signal.
Abstract translation: 移位寄存器电路包括第一晶体管，电容器，上拉控制电路，第一下拉电路，下拉控制电路，第二下拉电路和补偿电路。 补偿电路还包括第二晶体管，第三晶体管，第四晶体管，第五晶体管和第六晶体管。 第二晶体管，第三晶体管，第四晶体管和第五晶体管共同地用于输出补偿脉冲; 并且第六晶体管用于将补偿脉冲输出到第一晶体管的栅极端子，从而补偿控制信号。
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Patent Agency Ranking
公开(公告)号：US09208737B2
公开(公告)日：2015-12-08
申请号：US14325392
申请日：2014-07-08
Applicant: AU Optronics Corp.
Inventor： Kai-Wei Hong , Pin-Yu Chan , Li-Wei Liu , Yung-Chih Chen
IPC: G09G3/36
CPC classification number: G09G3/3674 , G09G2310/0286
Abstract: A shift register circuit has a plurality of shift registers. Each of the shift registers has at least four input terminals, a signal input terminal, an output terminal, a pull-up circuit, a driving circuit, a stability driving circuit, and a pull-down circuit. The signal input terminal receives an input signal, and the pull-up circuit is configured to pull up a voltage level of a node of the shift register. The driving circuit outputs a gate driving signal according to the voltage level of the node. The pull-down circuit is configured to pull down the voltage level of the node. The stability driving circuit can pull down the voltage of the output terminal according to the voltages of the four input terminals, and, thus, can reduce the response time of the shift register circuit and increase the operation region of the shift register circuit.
Abstract translation: 移位寄存器电路具有多个移位寄存器。 每个移位寄存器具有至少四个输入端子，信号输入端子，输出端子，上拉电路，驱动电路，稳定性驱动电路和下拉电路。 信号输入端子接收输入信号，并且上拉电路被配置为上拉移位寄存器的节点的电压电平。 驱动电路根据节点的电压电平输出栅极驱动信号。 下拉电路被配置为降低节点的电压电平。 稳定驱动电路可以根据四个输入端子的电压来降低输出端子的电压，从而可以减少移位寄存器电路的响应时间并增加移位寄存器电路的工作区域。
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公开(公告)号：US20140103983A1
公开(公告)日：2014-04-17
申请号：US13802690
申请日：2013-03-13
Applicant: AU OPTRONICS CORP.
Inventor： Ching-Hui Chang , Pin-Yu Chan , Kai-Wei Hong , Yung-Chih Chen
IPC: H03K3/015
CPC classification number: H03K3/015 , G09G3/3655 , G09G3/3677 , G09G2310/08 , G11C19/28
Abstract: A shift register of a gate driving circuit includes a pull-up unit for pulling up a first output signal and a first gate signal to a high voltage level according to a driving voltage and a high-frequency clock signal, a start-up unit for transmitting a second gate signal, an energy-store unit for providing the driving voltage to the pull-up unit according to the second gate signal, a first discharging unit for pulling down the driving voltage to a first voltage level according to a first control signal, a first leakage-preventing unit for turning off the first discharging unit when the first gate signal reaches the high voltage level, a first pull-down unit for respectively pulling down the first output and first gate signals to the first and a second voltage levels according to the first control signal, and a first control unit for generating the first control signal.
Abstract translation: 栅极驱动电路的移位寄存器包括：上拉单元，用于根据驱动电压和高频时钟信号将第一输出信号和第一栅极信号提升到高电压电平;启动单元，用于 发送第二门信号，用于根据第二门信号向上拉单元提供驱动电压的能量存储单元，用于根据第一控制信号将驱动电压下拉到第一电压电平的第一放电单元 第一防漏单元，用于当第一栅极信号达到高电压电平时关闭第一放电单元;第一下拉单元，用于分别将第一输出和第一栅极信号分别拉至第一和第二电压电平 以及用于产生第一控制信号的第一控制单元。
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公开(公告)号：US20150294734A1
公开(公告)日：2015-10-15
申请号：US14454729
申请日：2014-08-08
Applicant: AU Optronics Corp.
Inventor： Pin-Yu Chan , Chia-En Wu , Kai-Wei Hong , Li-Wei Liu , Yung-Chih Chen
CPC classification number: G11C19/28 , G09G2310/0267 , G09G2310/0286 , H03K17/161
Abstract: A gate driver has a plurality of shift registers. Each of the shift registers has at least three input terminals, two signal input terminals, a pull-up circuit, a driving circuit, a stability pull-down control circuit, and a stability pull-down circuit. The three input terminals of each shift register receive three different clock signals. Accordingly, the driving circuit and the stability pull-down control circuit of each shift register are controlled according to the three clock signals, such that a glitch causing by the coupling effect of the parasitic capacitor of the driving circuit is avoided and the stability of the gate driver is improved.
Abstract translation: 门驱动器具有多个移位寄存器。 每个移位寄存器具有至少三个输入端子，两个信号输入端子，上拉电路，驱动电路，稳定性下拉控制电路和稳定性下拉电路。 每个移位寄存器的三个输入端子接收三个不同的时钟信号。 因此，根据三个时钟信号来控制各个移位寄存器的驱动电路和稳定下拉控制电路，从而避免了由驱动电路的寄生电容器的耦合效应引起的毛刺，并且稳定性 门驱动程序得到改进。
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公开(公告)号：US20150255034A1
公开(公告)日：2015-09-10
申请号：US14325392
申请日：2014-07-08
Applicant: AU Optronics Corp.
Inventor： Kai-Wei Hong , Pin-Yu Chan , Li-Wei Liu , Yung-Chih Chen
IPC: G09G3/36
CPC classification number: G09G3/3674 , G09G2310/0286
Abstract: A shift register circuit has a plurality of shift registers. Each of the shift registers has at least four input terminals, a signal input terminal, an output terminal, a pull-up circuit, a driving circuit, a stability driving circuit, and a pull-down circuit. The signal input terminal receives an input signal, and the pull-up circuit is configured to pull up a voltage level of a node of the shift register. The driving circuit outputs a gate driving signal according to the voltage level of the node. The pull-down circuit is configured to pull down the voltage level of the node. The stability driving circuit can pull down the voltage of the output terminal according to the voltages of the four input terminals, and, thus, can reduce the response time of the shift register circuit and increase the operation region of the shift register circuit.
Abstract translation: 移位寄存器电路具有多个移位寄存器。 每个移位寄存器具有至少四个输入端子，信号输入端子，输出端子，上拉电路，驱动电路，稳定性驱动电路和下拉电路。 信号输入端子接收输入信号，并且上拉电路被配置为上拉移位寄存器的节点的电压电平。 驱动电路根据节点的电压电平输出栅极驱动信号。 下拉电路被配置为降低节点的电压电平。 稳定驱动电路可以根据四个输入端子的电压来降低输出端子的电压，从而可以减少移位寄存器电路的响应时间并增加移位寄存器电路的工作区域。
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公开(公告)号：US08971479B2
公开(公告)日：2015-03-03
申请号：US13802690
申请日：2013-03-13
Applicant: AU Optronics Corp.
Inventor： Ching-Hui Chang , Pin-Yu Chan , Kai-Wei Hong , Yung-Chih Chen
CPC classification number: H03K3/015 , G09G3/3655 , G09G3/3677 , G09G2310/08 , G11C19/28
Abstract: A shift register of a gate driving circuit includes a pull-up unit for pulling up a first output signal and a first gate signal to a high voltage level according to a driving voltage and a high-frequency clock signal, a start-up unit for transmitting a second gate signal, an energy-store unit for providing the driving voltage to the pull-up unit according to the second gate signal, a first discharging unit for pulling down the driving voltage to a first voltage level according to a first control signal, a first leakage-preventing unit for turning off the first discharging unit when the first gate signal reaches the high voltage level, a first pull-down unit for respectively pulling down the first output and first gate signals to the first and a second voltage levels according to the first control signal, and a first control unit for generating the first control signal.
Abstract translation: 栅极驱动电路的移位寄存器包括：上拉单元，用于根据驱动电压和高频时钟信号将第一输出信号和第一栅极信号提升到高电压电平;启动单元，用于 发送第二门信号，用于根据第二门信号向上拉单元提供驱动电压的能量存储单元，用于根据第一控制信号将驱动电压下拉到第一电压电平的第一放电单元 第一防漏单元，用于当第一栅极信号达到高电压电平时关闭第一放电单元;第一下拉单元，用于分别将第一输出和第一栅极信号分别拉至第一和第二电压电平 以及用于产生第一控制信号的第一控制单元。
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