公开(公告)号：US20160049107A1

公开(公告)日：2016-02-18

申请号：US14583597

申请日：2014-12-27

Applicant: AU Optronics Corp.

Inventor： Wei-Chu Hsu ,  Man-Wen Shih ,  Ya-Ling Chen ,  Chien-Ya Lee

IPC: G09G3/20

CPC classification number: G09G3/20 ,  G09G2310/0267 ,  G09G2310/0286 ,  G11C19/28

Abstract: A shift register includes a plurality of shift register circuits. Each of the shift register circuits includes a first switch, an input circuit, a pull-down circuit and a ripple reduction circuit. The first switch is used to output a scanning signal of the shift register circuit according to voltage levels of a node and a clock signal. The input circuit is used to pull up the voltage level of the node according to a scanning signal of a previous shift register circuit. The pull-down circuit is used to pull down the voltage levels of the node and the scanning signal of the shift register circuit according to a scanning signal of a following shift register circuit. The ripple reduction circuit is used to suppress ripples on the voltage levels of the node and the scanning signal caused by the coupling effect of the clock signal.

Abstract translation: 移位寄存器包括多个移位寄存器电路。 每个移位寄存器电路包括第一开关，输入电路，下拉电路和纹波降低电路。 第一开关用于根据节点的电压电平和时钟信号输出移位寄存器电路的扫描信号。 输入电路用于根据先前的移位寄存器电路的扫描信号来上拉节点的电压电平。 下拉电路用于根据随后的移位寄存器电路的扫描信号来降低节点的电压电平和移位寄存器电路的扫描信号。 纹波降低电路用于抑制由于时钟信号的耦合效应引起的节点电压电平和扫描信号的波动。

公开(公告)号：US09495904B2

公开(公告)日：2016-11-15

申请号：US13969628

申请日：2013-08-19

Applicant: AU Optronics Corp.

Inventor： Wei-Chu Hsu ,  Li-Wei Liu ,  Hua-Gang Chang

IPC: H05B33/08 ,  G09G3/32

CPC classification number: G09G3/3233 ,  G09G2300/0814 ,  G09G2300/0819 ,  H05B33/0806

Abstract: A light emitting diode module includes a light emitting unit and a light emitting diode circuit. The light emitting diode circuit includes four transistors and a storage capacitor. A first transistor includes a first end for receiving a data signal, and a control end. The storage capacitor has a first end coupled to a second end of the first transistor. A second transistor has a first end coupled to a first voltage source, and a control end. A third transistor has a first end coupled to a second end of the second transistor, and a control end coupled to a second end of the storage capacitor. A fourth transistor has a first end coupled to the second end of the storage capacitor, a control end, and a second end coupled to the second end of the second transistor.

Abstract translation: 发光二极管模块包括发光单元和发光二极管电路。 发光二极管电路包括四个晶体管和存储电容器。 第一晶体管包括用于接收数据信号的第一端和控制端。 存储电容器具有耦合到第一晶体管的第二端的第一端。 第二晶体管具有耦合到第一电压源的第一端和控制端。 第三晶体管具有耦合到第二晶体管的第二端的第一端和耦合到存储电容器的第二端的控制端。 第四晶体管具有耦合到存储电容器的第二端的第一端，控制端和耦合到第二晶体管的第二端的第二端。

公开(公告)号：US20140339998A1

公开(公告)日：2014-11-20

申请号：US13969628

申请日：2013-08-19

Applicant: AU Optronics Corp.

Inventor： Wei-Chu Hsu ,  Li-Wei Liu ,  Hua-Gang Chang

IPC: H05B33/08

CPC classification number: G09G3/3233 ,  G09G2300/0814 ,  G09G2300/0819 ,  H05B33/0806

Abstract: A light emitting diode module includes a light emitting unit and a light emitting diode circuit. The light emitting diode circuit includes four transistors and a storage capacitor. A first transistor includes a first end for receiving a data signal, and a control end. The storage capacitor has a first end coupled to a second end of the first transistor. A second transistor has a first end coupled to a first voltage source, and a control end. A third transistor has a first end coupled to a second end of the second transistor, and a control end coupled to a second end of the storage capacitor. A fourth transistor has a first end coupled to the second end of the storage capacitor, a control end, and a second end coupled to the second end of the second transistor.

Abstract translation: 发光二极管模块包括发光单元和发光二极管电路。 发光二极管电路包括四个晶体管和存储电容器。 第一晶体管包括用于接收数据信号的第一端和控制端。 存储电容器具有耦合到第一晶体管的第二端的第一端。 第二晶体管具有耦合到第一电压源的第一端和控制端。 第三晶体管具有耦合到第二晶体管的第二端的第一端和耦合到存储电容器的第二端的控制端。 第四晶体管具有耦合到存储电容器的第二端的第一端，控制端和耦合到第二晶体管的第二端的第二端。

公开(公告)号：US09576517B2

公开(公告)日：2017-02-21

申请号：US14583597

申请日：2014-12-27

Applicant: AU Optronics Corp.

Inventor： Wei-Chu Hsu ,  Man-Wen Shih ,  Ya-Ling Chen ,  Chien-Ya Lee

IPC: G11C19/00 ,  G09G3/20 ,  G11C19/28

CPC classification number: G09G3/20 ,  G09G2310/0267 ,  G09G2310/0286 ,  G11C19/28

Abstract: A shift register includes a plurality of shift register circuits. Each of the shift register circuits includes a first switch, an input circuit, a pull-down circuit and a ripple reduction circuit. The first switch is used to output a scanning signal of the shift register circuit according to voltage levels of a node and a clock signal. The input circuit is used to pull up the voltage level of the node according to a scanning signal of a previous shift register circuit. The pull-down circuit is used to pull down the voltage levels of the node and the scanning signal of the shift register circuit according to a scanning signal of a following shift register circuit. The ripple reduction circuit is used to suppress ripples on the voltage levels of the node and the scanning signal caused by the coupling effect of the clock signal.

Abstract translation: 移位寄存器包括多个移位寄存器电路。 每个移位寄存器电路包括第一开关，输入电路，下拉电路和纹波降低电路。 第一开关用于根据节点的电压电平和时钟信号输出移位寄存器电路的扫描信号。 输入电路用于根据先前的移位寄存器电路的扫描信号来上拉节点的电压电平。 下拉电路用于根据随后的移位寄存器电路的扫描信号来降低节点的电压电平和移位寄存器电路的扫描信号。 纹波降低电路用于抑制由于时钟信号的耦合效应引起的节点电压电平和扫描信号的波动。

公开(公告)号：US09514680B2

公开(公告)日：2016-12-06

申请号：US14587589

申请日：2014-12-31

Applicant: AU OPTRONICS CORP.

Inventor： Li-Wei Liu ,  Wei-Chu Hsu ,  Yung-Chih Chen

IPC: G09G3/3233 ,  G09G3/32

CPC classification number: G09G3/3233 ,  G09G2230/00 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2320/0233 ,  G09G2320/045

Abstract: A pixel driving circuit includes a light emitting diode (LED), a data writing unit, two transistors and two compensation units. The gate of the first transistor is coupled to the data writing unit for determining the current flow of the LED. The first compensation unit is coupled to the first transistor for providing a current path from the gate of the first transistor to a first voltage source and a current path from the gate of the first transistor to a second voltage source. The second compensation unit includes a first capacitor coupled to the gate of the first transistor for voltage coupling and providing a differential voltage that equals to the OLED to the gate of the first transistor. The second transistor is coupled between the first voltage source and a second voltage source for enabling or disabling the current flow between the first and second voltage sources.

Abstract translation: 像素驱动电路包括发光二极管（LED），数据写入单元，两个晶体管和两个补偿单元。 第一晶体管的栅极耦合到数据写入单元，用于确定LED的当前流量。 第一补偿单元耦合到第一晶体管，用于提供从第一晶体管的栅极到第一电压源的电流路径以及从第一晶体管的栅极到第二电压源的电流路径。 第二补偿单元包括耦合到第一晶体管的栅极用于电压耦合的第一电容器，并将等于OLED的差分电压提供给第一晶体管的栅极。 第二晶体管耦合在第一电压源和第二电压源之间，用于启用或禁用第一和第二电压源之间的电流。