公开(公告)号：US10331533B2

公开(公告)日：2019-06-25

申请号：US15842752

申请日：2017-12-14

Applicant: Altera Corporation

Inventor： David Alexander Munday ,  Matthew Harbridge Gerlach

IPC: G06F11/00 ,  G06F11/30 ,  G06F11/32 ,  G06F11/07 ,  G06F11/267

Abstract: This disclosure relates to techniques for updating a memory map maintained by processing circuitry that is coupled to programmable logic circuitry. One of the techniques may involve detecting reconfiguration of a device component formed on a portion of the programmable logic circuitry using monitoring circuitry. The technique may further include generating a notification event based on the reconfiguration of the device component using the monitoring circuitry. The notification event may then be sent to the processing circuitry using the monitoring circuitry. The technique may further involve updating, using the processing circuitry, the memory map based on the notification event.

公开(公告)号：US20180203781A1

公开(公告)日：2018-07-19

申请号：US15842752

申请日：2017-12-14

Applicant: Altera Corporation

Inventor： David Alexander Munday ,  Matthew Harbridge Gerlach

IPC: G06F11/30 ,  G06F11/267 ,  G06F11/07 ,  G06F11/32

CPC classification number: G06F11/3037 ,  G06F11/079 ,  G06F11/267 ,  G06F11/327

Abstract: This disclosure relates to techniques for updating a memory map maintained by processing circuitry that is coupled to programmable logic circuitry. One of the techniques may involve detecting reconfiguration of a device component formed on a portion of the programmable logic circuitry using monitoring circuitry. The technique may further include generating a notification event based on the reconfiguration of the device component using the monitoring circuitry. The notification event may then be sent to the processing circuitry using the monitoring circuitry. The technique may further involve updating, using the processing circuitry, the memory map based on the notification event.

公开(公告)号：US09852040B1

公开(公告)日：2017-12-26

申请号：US15065746

申请日：2016-03-09

Applicant: Altera Corporation

Inventor： David Alexander Munday ,  Matthew Harbridge Gerlach

IPC: G06F11/00 ,  G06F11/30 ,  G06F11/07 ,  G06F11/32 ,  G06F11/267

CPC classification number: G06F11/3037 ,  G06F11/079 ,  G06F11/267 ,  G06F11/327

Abstract: This disclosure relates to techniques for updating a memory map maintained by processing circuitry that is coupled to programmable logic circuitry. One of the techniques may involve detecting reconfiguration of a device component formed on a portion of the programmable logic circuitry using monitoring circuitry. The technique may further include generating a notification event based on the reconfiguration of the device component using the monitoring circuitry. The notification event may then be sent to the processing circuitry using the monitoring circuitry. The technique may further involve updating, using the processing circuitry, the memory map based on the notification event.