公开(公告)号：US10591429B2

公开(公告)日：2020-03-17

申请号：US15187398

申请日：2016-06-20

Applicant: Analog Devices Inc.

Inventor： Colin G. Lyden ,  Donal Bourke ,  Dennis A. Dempsey ,  Dermot G. O'Keeffe ,  Patrick C. Kirby

IPC: G01N27/327 ,  G01N27/02 ,  H03L5/00 ,  G01N27/49 ,  H03F1/34 ,  H03F3/45

Abstract: A control circuit for use with a four terminal sensor, the sensor having first and second drive terminals and first and second measurement terminals, the control circuit arranged to drive at least one of the first and second drive terminals with an excitation signal, to sense a voltage difference between the first and second measurement terminals, and control the excitation signal such that the voltage difference between the first and second measurement terminals is within a target range of voltages, and wherein the control circuit includes N poles in its transfer characteristic and N−1 zeros in its transfer characteristic such that when a loop gain falls to unity the phase shift around a closed loop is not substantially 2π radians or a multiple thereof, where N is greater than 1.

公开(公告)号：US09726702B2

公开(公告)日：2017-08-08

申请号：US13626434

申请日：2012-09-25

Applicant: Analog Devices, Inc.

Inventor： Dermot O'Keeffe ,  Donal Bourke ,  David Harty ,  Tudor Vinereanu ,  Colin Lyden

IPC: G01R31/28 ,  H03F1/26 ,  H03B19/00 ,  G01R27/28

CPC classification number: G01R27/28

Abstract: A digital sine wave may be converted to an analog signal at a digital to analog converter (DAC). The converted analog signal may be supplied to a device and an analog return signal from the device may be passed through a relaxed anti-aliasing filter and converted to digital code words at an analog to digital converter (ADC). An impedance may be calculated from the results of a Fourier analysis of the digital code words. The ADC and DAC clock frequencies may be asynchronous, independently variable, and have a greatest common factor of 1. The clock frequencies of the ADC and/or DAC may be adjusted to change a location of images in the ADC spectrum. By using these different, adjustable clock frequencies for the ADC and the DAC, an analog signal may have increased aliasing without introducing signal errors at a frequency of interest.