STRESS ANALYSIS OF SEMICONDUCTOR WAFERS
    1.
    发明申请
    STRESS ANALYSIS OF SEMICONDUCTOR WAFERS 审中-公开
    半导体波形的应力分析

    公开(公告)号:US20150323313A1

    公开(公告)日:2015-11-12

    申请号:US14705161

    申请日:2015-05-06

    Abstract: According to an aspect of an embodiment, a method may include measuring, based on interferometry, a film thickness of a surface film of a semiconductor wafer at a plurality of locations that are along a scanline of the wafer. The method may also include measuring, based on interferometry, a substrate thickness of a substrate of the semiconductor wafer at the plurality of locations. Moreover, the method may include measuring, based on an optical measurement technique, a curvature of the semiconductor wafer along the scanline. In addition, the method may include determining a stress of the surface film along the scanline based on the measured film thickness at the plurality of locations, based on the measured substrate thickness at the plurality of locations, and based on the measured curvature along the scanline.

    Abstract translation: 根据实施例的一个方面,一种方法可以包括基于干涉测量在沿着晶片的扫描线的多个位置处测量半导体晶片的表面膜的膜厚度。 该方法还可以包括基于干涉测量在多个位置处测量半导体晶片的衬底的衬底厚度。 此外,该方法可以包括基于光学测量技术测量沿着扫描线的半导体晶片的曲率。 此外,该方法可以包括基于在多个位置处测量的基板厚度,并且基于沿着扫描线的测量的曲率来确定基于在多个位置处测量的膜厚度沿着扫描线的表面膜的应力 。

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