公开(公告)号：US10930472B2

公开(公告)日：2021-02-23

申请号：US16250763

申请日：2019-01-17

Applicant: Applied Materials, Inc.

Inventor： Bencherki Mebarki ,  Annamalai Lakshmanan ,  Kaushal K. Singh ,  Andrew Cockburn ,  Ludovic Godet ,  Paul F. Ma ,  Mehul B. Naik

IPC: H01J37/32 ,  C23C16/42 ,  C23C16/56 ,  H01L21/285 ,  H01L21/768 ,  H01L21/3205 ,  H01L21/268

Abstract: Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide layer on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide layer in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer. In another embodiment, a method includes supplying a deposition gas mixture including at least a metal containing precursor and a reacting gas on a surface of a substrate, forming a plasma in the presence of the deposition gas mixture by exposure to microwave power, exposing the plasma to light radiation, and forming a metal silicide layer on the substrate from the deposition gas.

公开(公告)号：US10593592B2

公开(公告)日：2020-03-17

申请号：US14975028

申请日：2015-12-18

Applicant: Applied Materials, Inc.

Inventor： Bencherki Mebarki ,  Annamalai Lakshmanan ,  Kaushal K. Singh ,  Paul F. Ma ,  Mehul B. Naik ,  Andrew Cockburn ,  Ludovic Godet

IPC: H01L21/768 ,  H01L21/285 ,  H01L23/532 ,  H01L21/3205

Abstract: Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide stack comprising as plurality of metal silicide layers on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide stack in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer.

公开(公告)号：US10204764B2

公开(公告)日：2019-02-12

申请号：US14525555

申请日：2014-10-28

Applicant: Applied Materials, Inc.

Inventor： Bencherki Mebarki ,  Annamalai Lakshmanan ,  Kaushal K. Singh ,  Andrew Cockburn ,  Ludovic Godet ,  Paul F. Ma ,  Mehul Naik

IPC: C23C16/42 ,  H01J37/32 ,  H01L21/285 ,  H01L21/768 ,  H01L21/3205 ,  C23C16/56 ,  H01L21/268

Abstract: Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide layer on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide layer in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer. In another embodiment, a method includes supplying a deposition gas mixture including at least a metal containing precursor and a reacting gas on a surface of a substrate, forming a plasma in the presence of the deposition gas mixture by exposure to microwave power, exposing the plasma to light radiation, and forming a metal silicide layer on the substrate from the deposition gas.

公开(公告)号：US09613859B2

公开(公告)日：2017-04-04

申请号：US14975231

申请日：2015-12-18

Applicant: Applied Materials, Inc.

Inventor： Annamalai Lakshmanan ,  Bencherki Mebarki ,  Kaushal K. Singh ,  Paul F. Ma ,  Mehul B. Naik ,  Andrew Cockburn ,  Ludovic Godet

IPC: H01L21/768 ,  H01L21/285 ,  H01L21/3205 ,  H01L23/532

CPC classification number: H01L21/76879 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/32053 ,  H01L21/76802 ,  H01L21/76876 ,  H01L21/76886 ,  H01L21/76889 ,  H01L23/53257 ,  H01L23/53271 ,  H01L2221/1094

Abstract: Methods for direct deposition of a metal silicide nanowire for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes positioning a substrate in a processing region of a process chamber, the substrate having a first surface comprising a non-dielectric material; and a dielectric layer formed on the first surface. An opening is formed in the dielectric layer, the opening exposing at least a portion of the first surface, the opening having sidewalls. A metal silicide seed is deposited in the opening using a PVD process, wherein the PVD process is performed with either no bias or a bias which creates deposition on the sidewall which is less than 1% of the deposition on the first surface. A metal silicide layer is then selectively deposited on the metal silicide seed using a metal-silicon organic precursor, creating the metal silicide nanowire.