公开(公告)号：US20020025599A1

公开(公告)日：2002-02-28

申请号：US09941384

申请日：2001-08-28

Applicant: Aptos Corporation

Inventor： Chung W. Ho ,  Tsing-Chow Wang

IPC: H01L021/48

CPC classification number: H01L24/12 ,  H01L21/4853 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05671 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13583 ,  H01L2224/136 ,  H01L2224/13647 ,  H01L2224/13671 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01054 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H05K3/3436 ,  H05K2201/0379 ,  H05K2201/1025 ,  H05K2201/2081 ,  H05K2203/0315 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/29099 ,  H01L2924/00

Abstract: Within a method for forming a solder interconnection structure for use within a microelectronic fabrication, there is first provided a substrate having formed thereover a bond pad. There is then formed upon the bond pad a first solder interconnection layer. There is then formed over the first solder interconnection layer an annular solder non-wettable copper oxide layer which does not cover an upper dome portion of the first solder interconnection layer. There is then formed over the upper dome portion of the first solder interconnection layer and not upon the annular solder non-wettable copper oxide layer a second solder interconnection layer.

Abstract translation: 在用于形成在微电子制造中使用的焊料互连结构的方法中，首先提供了在接合焊盘之上形成的衬底。 然后在接合焊盘上形成第一焊料互连层。 然后在第一焊料互连层上形成不覆盖第一焊料互连层的上部圆顶部分的环形焊料不可湿性氧化铜层。 然后形成在第一焊料互连层的上部圆顶部分上方，而不是在环形焊料不可湿性氧化铜层上形成第二焊料互连层。

公开(公告)号：US20040137707A1

公开(公告)日：2004-07-15

申请号：US10342220

申请日：2003-01-13

Applicant: Aptos Corporation

Inventor： Kuolung Lei ,  Tony Shen ,  Susana Samoranos ,  Te-Sung Wu ,  Tsing-Chow Wang

IPC: H01L021/44

CPC classification number: H01L24/11 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05184 ,  H01L2224/05572 ,  H01L2224/1147 ,  H01L2224/11472 ,  H01L2224/11474 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2924/0001 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05671 ,  H01L2224/05684 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171

Abstract: A method of making an electrical contact bump electrical contact structure on a substrate comprising: providing a substrate having a bond pad, and a passivation layer overlying a portion of the substrate and wherein the passivation layer includes an opening therein exposing a portion of the bond pad, and wherein the passivation layer has a raised portion overlying the bond pad; forming an under bump metallurgy over at least the exposed portion of the bond pad and over at least a portion of the raised portion of the passivation layer overlying the bond pad; forming a sacrificial blanket having an opening therein that in cross-section has an inverted T-shape over the substrate so that the opening in the sacrificial blanket is aligned with the bond pad; and depositing an electrically conductive material into the opening in the sacrificial blanket.

Abstract translation: 一种在衬底上形成电接触凸点电接触结构的方法，包括：提供具有接合焊盘的衬底和覆盖衬底的一部分的钝化层，并且其中所述钝化层包括其中露出所述接合焊盘的一部分的开口 ，并且其中所述钝化层具有覆盖所述接合焊盘的凸起部分; 在所述接合焊盘的至少暴露部分上方以及覆盖所述接合焊盘的所述钝化层的所述隆起部分的至少一部分上方形成凸起下冶金; 形成其中具有开口的牺牲毯，其中横截面在衬底上具有倒T形，使得牺牲覆盖层中的开口与接合焊盘对准; 以及将导电材料沉积到牺牲层中的开口中。

公开(公告)号：US20030049924A1

公开(公告)日：2003-03-13

申请号：US09970231

申请日：2001-10-03

Applicant: Aptos Corporation

Inventor： Tsing-Chow Wang

IPC: H01L021/44

CPC classification number: H01L24/12 ,  H01L23/49816 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05572 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00 ,  H01L2224/05541 ,  H01L2224/05005

Abstract: Within both a method for fabricating a microelectronic fabrication, and the microelectronic fabrication fabricated employing the method, there is first provided a substrate. Within the method, there is then formed over the substrate a patterned bond pad layer. There is then formed over the patterned bond pad layer a barrier layer comprising: (1) a first titanium-tungsten alloy layer; (2) a titanium-tungsten alloy nitride layer formed upon the first titanium-tungsten alloy layer; and (3) a second titanium-tungsten alloy layer formed upon the titanium-tungsten alloy nitride layer. The method contemplates a microelectronic fabrication fabricated employing the method. The barrier layer provides enhanced barrier properties within the microelectronic fabrication within which is formed the barrier layer.

Abstract translation: 在制造微电子制造的方法和使用该方法制造的微电子制造两者中，首先提供了一种衬底。 在该方法中，然后在衬底上形成图案化的接合焊盘层。 然后在图案化的接合焊盘层上形成阻挡层，该阻挡层包括：（1）第一钛 - 钨合金层; （2）形成在第一钛 - 钨合金层上的钛 - 钨合金氮化物层; 和（3）形成在钛 - 钨合金氮化物层上的第二钛 - 钨合金层。 该方法考虑使用该方法制造的微电子制造。 阻挡层在微电子制造中提供增强的阻挡性能，其中形成阻挡层。