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公开(公告)号:US20250007755A1
公开(公告)日:2025-01-02
申请号:US18341848
申请日:2023-06-27
Inventor: Randall T. Enderby , Jake H. Rivard
IPC: H04L12/50
Abstract: A switch matrix structure for planar circuitry such as printed circuit boards and integrated circuits includes a plurality of signal dividers and a plurality of switches. Each signal divider is configured to receive a corresponding input signal and generate a corresponding plurality of divider output signals. Each switch is configured to receive a corresponding divider output from a corresponding signal divider. Each switch is configured to provide a corresponding output signal such that a plurality of output signals are generated by the plurality of switches. In an example, the plurality of switches are arranged in a column, with a first subset of the plurality of signal dividers on a first side of the column, and a second subset of the plurality of signal dividers on a second side of the column. In an example, such a routing configuration reduces a number of routing layers and/or a number of via transitions.
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公开(公告)号:US20250150101A1
公开(公告)日:2025-05-08
申请号:US18387181
申请日:2023-11-06
Inventor: Jake H. Rivard , Robert P. Taylor , Randall T. Enderby , William H. Cantrell , Mark Tinch , John M. Edwards , Mark E. Hughes , Andrew G. Macdonald , Timothy E. Wiltgen
Abstract: A switch matrix circuit module for routing signals. In an example, the module includes a switch matrix coupled with first and second switches. The switch matrix is configured to receive a plurality of input signals, and output a selected one of the plurality of input signals as a first intermediate signal and another selected one of the plurality of input signals as a second intermediate signal. The first switch receives the first intermediate signal and a first auxiliary signal, and outputs a first output signal, and the second switch receives the second intermediate signal and a second auxiliary signal, and outputs a second output signal. A number of the modules can be coupled together to provide a switch matrix circuit, which can be readily scaled by adding further modules. In an example, the plurality of input signals are radio frequency (RF) signals.
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公开(公告)号:US11165457B1
公开(公告)日:2021-11-02
申请号:US16992473
申请日:2020-08-13
Inventor: Randall T. Enderby
IPC: H04B1/26
Abstract: Techniques are provided for tuning over a broad radio frequency (RF) bandwidth. A tuner implementing the techniques according to an embodiment includes an input module compromising a single-conversion superheterodyne receiver to convert a first RF signal to a processed RF signal by frequency translating from a first frequency range to a lower second frequency range. The input module is also configured to receive a second RF signal occupying the second frequency range and provide the second RF signal as a pass-through RF signal. The tuner also includes a down-conversion module to convert the processed RF signal to a first intermediate frequency (IF) signal by frequency translating the processed RF signal from the second frequency range to a lower third frequency range, and to convert the pass-through RF signal to a second IF signal by frequency translating the pass-through RF signal from the second frequency range to the third frequency range.
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