公开(公告)号：US3920894A

公开(公告)日：1975-11-18

申请号：US45017174

申请日：1974-03-11

Applicant: BELL TELEPHONE LABOR INC

Inventor： SHIRLEY DORREL ROOSEVELT ,  STILES SR GILBERT JOHNSON

IPC: H03K3/84 ,  H04L7/00 ,  H04L25/03 ,  H04L25/48 ,  H04B1/10 ,  H03K13/32 ,  H04L9/04

CPC classification number: H04L25/03872

Abstract: A low speed, parallel word generator is developed from a series connected pseudo-random word generator that comprises a maximal length feedback shift register with a modulo-2 adder in the feedback path. More specifically, the n cells of said shift register are reconnected to form a parallel m-rail output version of the series connected word generator. The m-rail output has a pseudo-random binary sequence that is normally the same as the pseudo-random output sequence of the series word generator. The reconnecting circuitry includes a plurality of modulo-2 adders selectively connected between predetermined cells of the parallel word generator. Clock pulse signals are applied to each of the cells of the reconnected circuit at a rate that is normally 1/m times the rate at which the series word generator is clocked. A skip mode is periodically established, after a preselected number of input clock pulses, to cause the parallel word generator to skip a normal clock pulse period and alternatively to advance the parallel format, pseudo-random, binary sequence by a selected additional amount.