公开(公告)号：US3922619A

公开(公告)日：1975-11-25

申请号：US43715574

申请日：1974-01-28

Applicant: BELL TELEPHONE LABOR INC

Inventor： THOMPSON JOHN STEWART

IPC: H03M3/04 ,  H03K13/22

CPC classification number: H03M3/042

Abstract: An adaptive n-bit DPCM encoder includes a standard delta modulator (DM) and n-bit counter to count the output pulses from the DM in forming a DPCM code word. A register stores a digital representation of the current step size which is updated after 2n input sample periods. Because the step sizes are constrained to be proportional to integer powers of 2 and because both the stepsize representation and the contents of the n-bit counter are transmitted together, it is always possible to linearize the DPCM code, e.g., prior to digital filtering, by merely shifting a number of bit positions indicated by the step size. A complementary transition is performed by a disclosed decoder.

Abstract translation: 自适应n位DPCM编码器包括标准增量调制器（DM）和n位计数器，以在形成DPCM码字时对来自DM的输出脉冲进行计数。 寄存器存储在2n个输入采样周期之后更新的当前步长的数字表示。 因为步长被限制为与2的整数倍成比例，并且由于步长表示和n位计数器的内容都被一起发送，所以总是可以将DPCM代码线性化，例如在数字 通过仅移动由步长指示的多个位位置进行滤波。 互补转换由公开的解码器执行。

公开(公告)号：US3629846A

公开(公告)日：1971-12-21

申请号：US3629846D

申请日：1970-06-11

Applicant: BELL TELEPHONE LABOR INC

Inventor： THOMPSON JOHN STEWART

IPC: H04Q11/04 ,  H04B3/00

CPC classification number: H04Q11/0407

Abstract: Storage access to multiple storage locations is coordinated for the time slots of successive frames of a time slot interchange operation in a time division multiplex system by registering location access control signal changes, identifying first and second time slots of interest, and then identifying a transmission path in the form of a time-location sequence of uniform location availability status between such time slots in the time-storage domain of the locations. Time coordinates of the termini of the sequence are registered for use by the system''s control logic to determine one or more locations of the sequence and to store appropriate information in control memories supplying the access control signals. Pathfinding embodiments are shown for time slot interchangers using as storage the locations of a reentrant shift register, a random access memory, or a delay line.

公开(公告)号：US3649763A

公开(公告)日：1972-03-14

申请号：US3649763D

申请日：1970-05-27

Applicant: BELL TELEPHONE LABOR INC

Inventor： THOMPSON JOHN STEWART

IPC: H04Q11/06 ,  H04J3/00

CPC classification number: H04Q11/06

Abstract: Control memories actuate space division switching matrices to connect plural time division multiplex lines to different input and output connections of time slot unit storage locations for performing plural time slot interchange functions simultaneously and independently in different portions of the locations. In two embodiments the locations are in a dynamic form as the respective stages of a reentrant shift register and the respective locations in a circulating delay line. In another embodiment the locations are in a static form as the respective memory devices in a random access memory. In any embodiment status and compare circuits evaluate storage location control signals for finding an available path of suitable length in the time-storage domain of the locations for establishing new connections between calling and called lines.

Abstract translation: 控制存储器启动空分开关矩阵以将多个时分多路复用线连接到时隙单元存储位置的不同输入和输出连接，用于在位置的不同部分中同时且独立地执行多个时隙交换功能。 在两个实施例中，位置作为可重入移位寄存器的各个级和循环延迟线中的相应位置处于动态形式。 在另一个实施例中，位置是作为随机存取存储器中的相应存储器件的静态形式。 在任何实施例中，状态和比较电路评估存储位置控制信号，以在用于建立呼叫和被叫线路之间的新连接的位置的时间存储域中找到适当长度的可用路径。