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1.
公开(公告)号:US20230282172A1
公开(公告)日:2023-09-07
申请号:US18016716
申请日:2021-06-21
Inventor: Kaimin YIN , Wei HAO , Lingyun SHI , Wenchieh HUANG , Feifei WANG , Wengang SU , Rui SHI , Xingce SHANG , Junwei ZHANG , Taotao DUAN
IPC: G09G3/3283
CPC classification number: G09G3/3283
Abstract: The present disclosure provides a driver circuit, a driving method of the driver circuit, an array substrate and a display device, belonging to the field of display technology. The driver circuit provided by the present disclosure includes a logic control module, a data pin and at least two output pins. The data pin is configured to receive driving data. The logic control module is configured to generate driving control signals in a one-to-one correspondence with the at least two output pins according to the driving data. The driving control signals are configured to control the current flowing through the corresponding output pins.
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公开(公告)号:US20240221697A1
公开(公告)日:2024-07-04
申请号:US17923946
申请日:2021-11-16
Inventor: Junwei ZHANG , Feifei WANG , Wei HAO , Wengang SU , Kaimin YIN , Xingce SHANG , Taotao DUAN , Liguang GENG , Huangfei CHA , Yu DENG
IPC: G09G3/36 , G02F1/1335 , G02F1/13357 , H01L25/16
CPC classification number: G09G3/3611 , G02F1/133603 , G02F1/133612 , G09G2310/0243 , G09G2330/00 , H01L25/167
Abstract: A driver circuit includes a logic control component and a plurality of pins coupled to the logic control component. The plurality of pins include a clock pin, a data pin and at least two output pins. The clock pin is configured to receive a clock signal. The data pin is configured to receive, under control of the logic control component, a data signal in a period of an active level of the clock signal. The logic control component is configured to generate a driving control signal corresponding to each output pin according to the data signal, so as to control an electrical signal flowing through the output pin.
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公开(公告)号:US20250140214A1
公开(公告)日:2025-05-01
申请号:US19010564
申请日:2025-01-06
Inventor: Junwei ZHANG , Wei HAO , Feifei WANG , Wengang SU , Kaimin YIN , Xingce SHANG , Taotao DUAN , Liguang GENG , Huangfei CHA , Yu DENG
IPC: G09G3/36 , G02F1/1335 , G02F1/13357 , H01L25/16
Abstract: A driver circuit includes a logic control component and a plurality of pins coupled to the logic control component. The plurality of pins include a clock pin, a data pin and at least two output pins. The clock pin is configured to receive a clock signal. The data pin is configured to receive, under control of the logic control component, a data signal in a period of an active level of the clock signal. The logic control component is configured to generate a driving control signal corresponding to each output pin according to the data signal, so as to control an electrical signal flowing through the output pin.
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公开(公告)号:US20240234657A1
公开(公告)日:2024-07-11
申请号:US17756513
申请日:2021-06-25
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Ming YANG , Xingce SHANG , Wei HAO , Zhenyu ZHANG , Fuqiang LI , Wanzhi CHEN
IPC: H01L33/62 , H01L25/075
CPC classification number: H01L33/62 , H01L25/0753
Abstract: The present disclosure provides an array substrate, a backlight and a display device which both include the array substrate. The array substrate includes multiple light-emitting units arranged in M rows and N columns and multiple first signal lines. Multiple first signal lines are divided into N groups, and each group of first signal lines is electrically connected to a column of light-emitting units. Each group of first signal lines includes at least two first signal lines, for each column of light-emitting units, at least two consecutive rows of light-emitting units are electrically connected to one of the at least two first signal lines, and the remaining at least one row of light-emitting unit is electrically connected to the other one of the at least two first signal lines, M is a positive integer greater than or equal to 3, N is a positive integer greater than or equal to 1.
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5.
公开(公告)号:US20250140210A1
公开(公告)日:2025-05-01
申请号:US19010377
申请日:2025-01-06
Inventor: Kaimin YIN , Wei HAO , Lingyun SHI , Wenchieh HUANG , Feifei WANG , Wengang SU , Rui SHI , Xingce SHANG , Junwei ZHANG , Taotao DUAN
IPC: G09G3/3283
Abstract: The present disclosure provides a driver circuit, a driving method of the driver circuit, an array substrate and a display device, belonging to the field of display technology. The driver circuit provided by the present disclosure includes a logic control module, a data pin and at least two output pins. The data pin is configured to receive driving data. The logic control module is configured to generate driving control signals in a one-to-one correspondence with the at least two output pins according to the driving data. The driving control signals are configured to control the current flowing through the corresponding output pins.
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公开(公告)号:US20220117059A1
公开(公告)日:2022-04-14
申请号:US17364679
申请日:2021-06-30
Inventor: Wei HAO , Lingyun SHI , Wenchieh HUANG , Feifei WANG , Wengang SU , Rui SHI , Xingce SHANG , Junwei ZHANG , Kaimin YIN , Qibing GU , Lili JIA , Xiurong WANG
Abstract: A method of controlling a driving circuit applicable to a light-emitting substrate which includes a light-emitting assembly including a plurality of light-emitting-element strings connected in parallel, each of the plurality of light-emitting strings comprising a plurality of light-emitting-elements connected in series, the driving circuit connected to the plurality of light-emitting-element strings via a wiring, wherein the method comprises: obtaining a wiring IR drop, a light-emitting element string IR drop, a voltage deviation, and a channel IR drop; obtaining a target power supply voltage according to the wiring IR drop. the light-emitting element string IR drop, the voltage deviation, and the channel IR drop; comparing the target power supply voltage with an output voltage to obtain a comparison result; generating an adjustment signal according to the comparison result; and adjusting the output voltage according to the adjustment signal. A driving circuit and a light-emitting substrate are further provided.
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