公开(公告)号：US20240255820A1

公开(公告)日：2024-08-01

申请号：US18017413

申请日：2022-03-31

Applicant: BOE Technology Group Co., Ltd.

Inventor： Yunping DI ,  Lizhong WANG ,  Ce NING ,  Binbin TONG ,  Liping LEI ,  Jianbo XIAN

IPC: G02F1/1368 ,  G02F1/1362 ,  H01L27/12

CPC classification number: G02F1/1368 ,  G02F1/136209 ,  G02F1/136227 ,  G02F1/136295 ,  H01L27/1244 ,  H01L27/1288

Abstract: Provided is a substrate. The substrate includes a base substrate; and a plurality of sub-pixel structures arranged in an array on the base substrate, wherein the sub-pixel structure comprises: a thin film transistor disposed on the base substrate, the thin film transistor comprising a source and a drain; an insulating layer disposed on a side of the thin film transistor distal from the base substrate, a first via hole being formed in the insulating layer; a pixel electrode disposed on a side of the insulating layer distal from the base substrate, the pixel electrode being electrically connected to either the source or the drain through the first via hole; and a filling block disposed at the first via hole.

公开(公告)号：US20220376137A1

公开(公告)日：2022-11-24

申请号：US17435016

申请日：2020-11-06

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Mingxing WANG ,  Binbin TONG ,  Lizhen ZHANG ,  Chenyang ZHANG ,  Zhen ZHANG ,  Xiawei YUN ,  Guangcai YUAN ,  Xue DONG ,  Muxin DI ,  Zhiwei LIANG ,  Ke WANG ,  Zhanfeng CAO

IPC: H01L33/38 ,  H01L33/46 ,  H01L33/62 ,  H01L33/00 ,  H01L25/075

Abstract: A light-emitting diode (LED) chip includes a plurality of epitaxial structures, at least one first electrode, and a plurality of second electrodes. Any two adjacent epitaxial structures of the plurality of epitaxial structures have a gap therebetween. Each epitaxial structure includes a first semiconductor pattern, a light-emitting pattern and a second semiconductor pattern stacked in sequence. First semiconductor patterns in at least two of the plurality of epitaxial structures are connected to each other to form a first semiconductor layer. A first electrode is electrically connected to the first semiconductor layer. Each second electrode is electrically connected to the second semiconductor pattern in at least one of the plurality of epitaxial structures.

公开(公告)号：US20240241415A1

公开(公告)日：2024-07-18

申请号：US18574261

申请日：2023-01-10

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lizhong WANG ,  Guangcai YUAN ,  Ce NING ,  Jianbo XIAN ,  Liping LEI ,  Chunping LONG ,  Yunping DI ,  Binbin TONG ,  Zhen ZHANG

IPC: G02F1/1368 ,  G02F1/1362

CPC classification number: G02F1/1368 ,  G02F1/136222 ,  G02F1/136286

Abstract: An array substrate and a display panel. The array substrate includes: a base substrate; a gate line and a data line on the base substrate, the gate line intersect the data line to define a pixel region; a metal oxide thin film transistor is arranged in the pixel region, the metal oxide thin film transistor includes a metal oxide semiconductor layer; the metal oxide semiconductor layer includes a first part and a second part; the first part and the data line are connected through a first via hole; the first part is in a stripe shape; a first included angle is between extension directions of the first part and the data line; an orthographic projection of the second part overlap with an orthographic projection of the gate line on the base substrate and do not overlap with an orthographic projection of the data line on the base substrate.

公开(公告)号：US20220276540A1

公开(公告)日：2022-09-01

申请号：US17504402

申请日：2021-10-18

Applicant: BOE Technology Group Co., Ltd.

Inventor： Lizhong WANG ,  Ce NING ,  Binbin TONG ,  Zhen ZHANG ,  Fuqiang LI ,  Zhenyu ZHANG

IPC: G02F1/1362 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/786 ,  H01L21/02 ,  H01L29/66

Abstract: The disclosure provides an array substrate, a manufacturing method thereof and a display panel, and relates to the technical field of display. The array substrate comprises a first transistor arranged on one side of a substrate base, the first transistor being located in an active area of the array substrate; a flat layer covering the first transistor, the flat layer having a first through-hole; a first electrode layer arranged in the first through-hole, and being connected with a drain of the first transistor and having a first groove; a filling layer arranged in the first groove; and a second electrode layer arranged on a side, away from the first transistor, of the filling layer, the second electrode layer being connected with the first electrode layer. So an electric field for driving a liquid crystal layer is more uniform, thereby improving an aperture ratio of the display panel.

公开(公告)号：US20250164844A1

公开(公告)日：2025-05-22

申请号：US19032853

申请日：2025-01-21

Applicant: BOE Technology Group Co., Ltd.

Inventor： Yunping DI ,  Lizhong WANG ,  Ce NING ,  Binbin TONG ,  Liping LEI ,  Jianbo XIAN

IPC: G02F1/1368 ,  G02F1/1362 ,  H10D86/01 ,  H10D86/40 ,  H10D86/60

Abstract: Provided is a substrate. The substrate includes a base substrate; and a plurality of sub-pixel structures arranged in an array on the base substrate, wherein the sub-pixel structure comprises: a thin film transistor disposed on the base substrate, the thin film transistor comprising a source and a drain; an insulating layer disposed on a side of the thin film transistor distal from the base substrate, a first via hole being formed in the insulating layer; a pixel electrode disposed on a side of the insulating layer distal from the base substrate, the pixel electrode being electrically connected to either the source or the drain through the first via hole; and a filling block disposed at the first via hole.

公开(公告)号：US20230163143A1

公开(公告)日：2023-05-25

申请号：US17919547

申请日：2021-11-17

Applicant: BOE Technology Group Co., Ltd.

Inventor： Lizhong WANG ,  Ce NING ,  Tianmin ZHOU ,  Wei YANG ,  Yunping DI ,  Rui HUANG ,  Binbin TONG ,  Liping LEI

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368

CPC classification number: H01L27/1251 ,  H01L27/124 ,  G02F1/136295 ,  H01L27/1225 ,  G02F1/13685 ,  G02F1/136209

Abstract: An array substrate and a display panel, relating to the technical field of display. The array substrate includes a base substrate, and a thin film transistor group which is provided on one side of the base substrate and includes at least two thin film transistors, the thin film transistors being stacked in a direction perpendicular to the base substrate.

公开(公告)号：US20250048756A1

公开(公告)日：2025-02-06

申请号：US18280731

申请日：2023-02-28

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Rui HUANG ,  Jie HUANG ,  Jinchao ZHANG ,  Yunping DI ,  Wei YANG ,  Binbin TONG

IPC: H01L27/146

Abstract: A photo detection substrate, including: a base substrate; and a plurality of detection pixel units on the base substrate, where each detection pixel unit includes a signal reading circuit and a photoelectric conversion structure; the signal reading circuit includes at least one transistor each including a gate and an active layer pattern, the active layer pattern includes a channel region and a source/drain doped region; at least one transistor in the signal reading circuit is a superposed transistor on a side of the photoelectric conversion structure away from the base substrate, an orthographic projection of the active layer pattern of the superposed transistor on the base substrate overlaps an orthographic projection of the photoelectric conversion structure in the same detection pixel unit on the base substrate, and a material of the gate of the superposed transistor includes a transparent conductive material.

公开(公告)号：US20240304633A1

公开(公告)日：2024-09-12

申请号：US18280682

申请日：2022-11-30

Applicant: BOE Technology Group Co., Ltd.

Inventor： Binbin TONG ,  Ce NING ,  Lizhong WANG ,  Rui HUANG ,  Wei YANG ,  Meng ZHAO ,  Tianmin ZHOU ,  Jinchao ZHANG ,  Hui GUO

IPC: H01L27/12

CPC classification number: H01L27/124 ,  H01L27/1248 ,  H01L27/127 ,  H01L27/1225

Abstract: The present invention provides a pixel unit structure, in which a source electrode is connected to a data line in a thin film transistor; the gate electrode is connected to the gate line; the drain electrode is disposed on a side of the gate insulating layer away from the substrate; the metal oxide semiconductor layer is disposed on a side of the gate insulating layer away from the substrate, and includes a semiconductor portion and a first conductive portion and a second conductive portion respectively located on both sides of the semiconductor portion; a terminal of the first conductive portion adjacent to the drain electrode is connected to the drain electrode or serves as at least a portion of the drain electrode; and the second conductive portion is connected to the source electrode through a first via formed correspondingly on the gate insulating layer and the interlayer dielectric layer.

公开(公告)号：US20240204002A1

公开(公告)日：2024-06-20

申请号：US17910525

申请日：2021-10-28

Applicant: BOE Technology Group Co., Ltd.

Inventor： Zhen ZHANG ,  Fuqiang LI ,  Zhenyu ZHANG ,  Lizhong WANG ,  Yunping DI ,  Ce NING ,  Zheng FANG ,  Chenyang ZHANG ,  Yawei WANG ,  Wei WANG ,  Hongrun WANG ,  Binbin TONG ,  Nianqi YAO ,  Jiahui HAN ,  Chengfu XU ,  Pengxia LIANG

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368

CPC classification number: H01L27/1225 ,  G02F1/136222 ,  G02F1/136227 ,  G02F1/136295 ,  G02F1/1368 ,  H01L27/124 ,  H01L27/127

Abstract: Embodiments of the present disclosure provide an array substrate and method for manufacturing same, a display panel, and a display device, and relate to the field of display technologies. The array substrate includes a color filter layer, such that a distance between a light source on a side, distal from the color filter layer, of the base substrate and the color filter layer is less. Thus, light from regions of the color resist blocks is avoided being emitted from adjacent color resist blocks, and a cross color of the display panel is further avoided, such that the display effect of the display panel is great. In addition, the color resist block is at least partially overlapped with a second portion of a metal oxide pattern in an oxide thin film transistor, such that an overall footprint of the oxide thin film transistor and the color filter layer can be reduced, so as to acquire the display panel of high PPI.