公开(公告)号：US20170011144A1

公开(公告)日：2017-01-12

申请号：US15119249

申请日：2015-05-08

Applicant: CSMC TECHNOLOGIES FAB1 CO., LTD.

Inventor： Yifeng HU ,  Xiaodong HE ,  Xinxin LIU

IPC: G06F17/50 ,  H01L27/02

CPC classification number: G06F17/5009 ,  G06F17/5036 ,  G06F2217/78 ,  H01L27/0207 ,  Y02E60/76 ,  Y04S40/22

Abstract: A high-voltage device simulation model and a modeling method thereof are provided. The simulation model comprises: a core transistor (101), a drain terminal resistor (102) and a source terminal resistor (103), wherein a first terminal of the drain terminal resistor (102) is electrically connected to a drain (d1) of the core transistor (101) and a second terminal of the drain terminal resistor (102) serves as the drain of the high voltage device; a first terminal of the source terminal resistor (103) is electrically connected to a source (s1) of the core transistor (101) and a second terminal of the source terminal resistor (103) serves as the source of the high voltage device. The relations of the resistance value of the drain terminal resistor (102) are as follows: RD=(RD0/W)*(1+CRD*VDERDD+1/(1+PRWDD*VDERDD))*TFAC_RD, and TFAC_RD=(1+TCRD1*(TEMP−25)+TCRD2*(TEMP−25)*(TEMP−25)).

Abstract translation: 提供了一种高压器件仿真模型及其建模方法。 模拟模型包括：芯体晶体管（101），漏极端子电阻（102）和源极端子电阻（103），其中漏极端子电阻（102）的第一端电连接到漏极（d1）的漏极 芯极晶体管（101）和漏极端子电阻（102）的第二端子用作高压器件的漏极; 源极端子电阻器（103）的第一端子电连接到核心晶体管（101）的源极（s1），源极端子电阻器（103）的第二端子用作高压器件的源极。 漏极端子电阻（102）的电阻值的关系如下：RD =（RD0 / W）*（1 + CRD * VDERDD + 1 /（1 + PRWDD * VDERDD））* TFAC_RD和TFAC_RD = 1 + TCRD1 *（TEMP-25）+ TCRD2 *（TEMP-25）*（TEMP-25））。