公开(公告)号：US20240047212A1

公开(公告)日：2024-02-08

申请号：US18258902

申请日：2021-07-27

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Hongfeng JIN ,  Ruibin CAO ,  Feng LIN ,  Xiang QIN ,  Yu HUANG ,  Chunxu LI

IPC: H01L21/265 ,  H01L29/66 ,  H01L29/78 ,  H01L21/027 ,  H01L21/266

CPC classification number: H01L21/2652 ,  H01L29/66681 ,  H01L29/7816 ,  H01L21/0274 ,  H01L21/266

Abstract: A semiconductor device and a manufacturing method therefor are disclosed. The method includes: providing a substrate of a first conductivity type; forming doped regions of a second conductivity type in the substrate, the doped regions including adjacent first and second drift regions, wherein the second conductivity type is opposite to the first conductivity type; forming a polysilicon film on the substrate, the polysilicon film covering the doped regions; forming patterned photoresist on the polysilicon film, which covers the first and second drift regions, and in which the polysilicon film above a reserved region for a body region between the first and second drift regions is exposed; and forming the body region of the first conductivity type in the reserved region by performing a high-energy ion implantation process, the body region having a top surface that is flush with top surfaces of the doped regions, the body region having a bottom surface that is not higher than bottom surfaces of the doped regions. The problem of morphological changes possibly experienced by the photoresist due to a high temperature in an etching process, which may lead to an impaired effect of the high-energy ion implantation process, can be circumvented.

公开(公告)号：US20200220010A1

公开(公告)日：2020-07-09

申请号：US16644856

申请日：2018-08-03

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Huajun JIN ,  Guipeng SUN ,  Hongfeng JIN

IPC: H01L29/78 ,  H01L29/66

Abstract: Provided in the present invention are an LDMOS component, a manufacturing method therefor, and an electronic device, comprising: a semiconductor substrate (100); a drift area (101) provided in the semiconductor substrate; a gate electrode structure (103) provided on a part of the surface of the semiconductor substrate and covers a part of the surface of the drift area; a source electrode (1052) and a drain electrode (1051) respectively provided in the semiconductor substrate on either side of the gate electrode structure, where the drain electrode is provided in the drift area and is separated from the gate electrode structure; a metal silicide barrier layer (106) covering the surface of at least a part of the semiconductor substrate between the gate electrode structure and the drain electrode; and a first contact hole (1081) provided on the surface of at least a part of the metal silicide barrier layer.