公开(公告)号：US08916957B2

公开(公告)日：2014-12-23

申请号：US13186488

申请日：2011-07-20

Applicant: Chi-Jang Lo

Inventor： Chi-Jang Lo

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L21/673 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49548 ,  H01L24/08 ,  H01L24/32 ,  H01L24/48 ,  H01L2224/08245 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A package structure and a package process are provided. The package structure comprises a carrier having a carrying portion and a plurality of supporting bar remnants disposed around and extending outward from the carrying portion, a chip mounted to the carrying portion, and an encapsulant disposed on the carrier and covering the chip, wherein the supporting bar remnants are encapsulated by the encapsulant, and each of the supporting bar remnants has a distal end shrank from an outer surface of the encapsulant. A package process for fabricating the package structure is also provided.

Abstract translation: 提供了封装结构和封装工艺。 包装结构包括具有承载部分和设置在承载部分周围并向外延伸的多个支撑棒残余物的载体，安装到承载部分的芯片以及设置在载体上并覆盖芯片的密封剂，其中支撑 棒残留物被密封剂包封，并且每个支撑棒残余物的远端从密封剂的外表面收缩。 还提供了用于制造封装结构的封装工艺。

公开(公告)号：US20070298225A1

公开(公告)日：2007-12-27

申请号：US11535946

申请日：2006-09-27

Applicant: Chi-Jang Lo ,  Li-Chih Fang

Inventor： Chi-Jang Lo ,  Li-Chih Fang

IPC: B32B9/04

CPC classification number: H05K3/305 ,  H01L23/498 ,  H01L23/49894 ,  H01L2924/0002 ,  Y02P70/613 ,  Y10T428/24802 ,  Y10T428/28 ,  Y10T428/31504 ,  H01L2924/00

Abstract: The surface of the circuit substrate is a solder mask. The solder mask protects the electrical circuit on the circuit substrate against suffering from the environmental damage. By dividing the area of the circuit substrate into the solder mask area and the adhesive area, a bismaleimide triazine layer is formed on the surface of the circuit substrate to coarsen the adhesive area and so as to enhance the adhesion strength between the chip and the circuit substrate.

Abstract translation: 电路基板的表面是焊接掩模。 焊接掩模保护电路基板上的电路免受环境破坏。 通过将电路基板的面积划分为焊料掩模区域和粘合剂区域，在电路基板的表面上形成双马来酰亚胺三嗪层，以使粘合剂区域粗化，以增强芯片和电路之间的粘合强度 基质。

公开(公告)号：US20130020686A1

公开(公告)日：2013-01-24

申请号：US13186488

申请日：2011-07-20

Applicant: Chi-Jang Lo

Inventor： Chi-Jang Lo

IPC: H01L23/495 ,  H01L21/60

CPC classification number: H01L21/673 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49548 ,  H01L24/08 ,  H01L24/32 ,  H01L24/48 ,  H01L2224/08245 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A package structure and a package process are provided. The package structure comprises a carrier having a carrying portion and a plurality of supporting bar remnants disposed around and extending outward from the carrying portion, a chip mounted to the carrying portion, and an encapsulant disposed on the carrier and covering the chip, wherein the supporting bar remnants are encapsulated by the encapsulant, and each of the supporting bar remnants has a distal end shrank from an outer surface of the encapsulant. A package process for fabricating the package structure is also provided.

Abstract translation: 提供了封装结构和封装工艺。 包装结构包括具有承载部分和设置在承载部分周围并向外延伸的多个支撑棒残余物的载体，安装到承载部分的芯片以及设置在载体上并覆盖芯片的密封剂，其中支撑 棒残留物被密封剂包封，并且每个支撑棒残余物的远端从密封剂的外表面收缩。 还提供了用于制造封装结构的封装工艺。

公开(公告)号：US20070158794A1

公开(公告)日：2007-07-12

申请号：US11325437

申请日：2006-01-05

Applicant: Chi-Jang Lo

Inventor： Chi-Jang Lo

IPC: H01L23/495

CPC classification number: H01L23/4951 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An assembly structure of thin lead-frame is provided. A lead-frame includes the plurality of leads and a layer located on the extension of the inner lead to bear a die. Then the molding compound is covered the die, the layer, and the plurality of leads but exposed the outer lead to electrically connect with different electric circuit substrates. The inner leads used as a die pad directly may reduce the size of the package. Furthermore, the assembly cost may drop dramatically and facilitate the assembly process due to the invention is totally different than prior package assembly method.

Abstract translation: 提供了薄引线框架的组装结构。 引线框架包括多个引线和位于内引线的延伸部上以承载芯片的层。 然后将模塑料覆盖模具，层和多根引线，但暴露外引线与不同的电路基板电连接。 直接用作管芯焊盘的内部引线可能会减小封装的尺寸。 此外，由于本发明与现有的封装组装方法完全不同，组装成本可能急剧下降并且便于组装过程。

公开(公告)号：US20070278692A1

公开(公告)日：2007-12-06

申请号：US11444480

申请日：2006-06-01

Applicant: Chi-Jang Lo ,  Li-chih Fang

Inventor： Chi-Jang Lo ,  Li-chih Fang

IPC: H01L23/48

CPC classification number: H01L21/565 ,  H01L23/13 ,  H01L23/3128 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A chip molded onto a substrate with a slot forms a molded semiconductor structure, wherein the chip covers one end of the slot and the other open. This special design leads the mold flow and enhances the semiconductor by a transverse pressure induced by the molding flow as the semiconductor is being molded. Moreover, to arrange the molded semiconductor structures especially in a cavity formed by the top portion die and bottom mold die avoids the flow spill. The special molded semiconductor structure and arrangement enhance the adhesion onto the bottom mold die to upgrade the molding quality.

Abstract translation: 模制在具有槽的基板上的芯片形成模制半导体结构，其中芯片覆盖槽的一端而另一端开口。 这种特殊的设计引导模具流动，并且通过在模制半导体时由模制流引起的横向压力来增强半导体。 此外，为了将模制的半导体结构特别设置在由顶部模具和底模具模具形成的空腔中，避免了溢流。 特殊的模制半导体结构和布置增强了对底模具的粘附力，从而提高了成型质量。

公开(公告)号：US20070158841A1

公开(公告)日：2007-07-12

申请号：US11330253

申请日：2006-01-12

Applicant: Chi-Jang Lo

Inventor： Chi-Jang Lo

IPC: H01L23/48

CPC classification number: H05K3/303 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H05K2201/10568 ,  H05K2201/10734 ,  H05K2201/2036 ,  Y02P70/613 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A structure of Ball Grid Array package (BGA) is provided. The plurality of bumps are attached on a substrate when processed the surface mount technology (SMT) may get stronger support, avoid the assembly structure disintegration when bearing an external force. When user uses a semi-conductor module, the assembly structure will not be damaged by external force.

Abstract translation: 提供了一种球栅阵列封装（BGA）的结构。 当处理表面贴装技术（SMT）可以获得更强的支撑时，多个凸起附着在基板上，避免在承受外力​​时组装结构的分解。 当用户使用半导体模块时，组装结构不会被外力损坏。