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公开(公告)号:US20250030387A1
公开(公告)日:2025-01-23
申请号:US18224770
申请日:2023-07-21
Inventor: John P. LESSO , Douglas J.W. MACFARLANE , John L. MELANSON
Abstract: This application relates to methods and apparatus for switching drivers. The switching driver has first and second switches for selectively connecting an output node to first and second switching voltages respectively to generate a first output voltage. A compensator is configured to receive a first monitor signal indicative of a sum of the first and second switching voltages and a second monitor signal indicative of a difference between the first and second switching voltages and to apply compensation to the input signal based on the first and second monitor signals so as to compensate for variations in the first and second switching voltages from defined nominal values of the first and second switching voltages. A modulator controls a duty cycle of the first and second switches based on the input signal after said compensation has been applied.
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公开(公告)号:US20250088186A1
公开(公告)日:2025-03-13
申请号:US18948973
申请日:2024-11-15
Inventor: John P. LESSO , Douglas J.W. MACFARLANE
IPC: H03K17/687 , H03K19/00 , H03K19/0185
Abstract: A switching transducer driver operable in: a first mode in which first and second output stage switches are controlled to generate a two-level output signal, wherein an impedance of the first output stage switch is substantially the same as an impedance of the second output stage switch; and a second mode in which the first and second output stage switches and a third switch are controlled to generate a three-level output signal, wherein an impedance of the third switch is substantially greater than the impedance of the first output stage switch and the second output stage switch.
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公开(公告)号:US20240364328A1
公开(公告)日:2024-10-31
申请号:US18308395
申请日:2023-04-27
Inventor: John P. LESSO , Douglas J.W. MACFARLANE
IPC: H03K17/687 , H03K19/00 , H03K19/0185
CPC classification number: H03K17/687 , H03K19/0005 , H03K19/018585
Abstract: A switching transducer driver operable in: a first mode in which first and second output stage switches are controlled to generate a two-level output signal, wherein an impedance of the first output stage switch is substantially the same as an impedance of the second output stage switch; and a second mode in which the first and second output stage switches and a third switch are controlled to generate a three-level output signal, wherein an impedance of the third switch is substantially greater than the impedance of the first output stage switch and the second output stage switch.
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