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公开(公告)号:US11429457B2
公开(公告)日:2022-08-30
申请号:US16584045
申请日:2019-09-26
Applicant: DELL PRODUCTS L.P.
Inventor: Balasingh P. Samuel , Michael Wayne Arms , Adolfo S. Montero
Abstract: A system for secure processing of intra-processor data comprising firmware configured to operate on a processor. An operating system configured to operate on the processor. Payload configured to operate on the processor. An embedded controller coupled to the firmware, the operating system and the payload, wherein the embedded controller is configured to enable messaging between the firmware, the operating system and the payload.
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公开(公告)号:US20210096931A1
公开(公告)日:2021-04-01
申请号:US16584045
申请日:2019-09-26
Applicant: DELL PRODUCTS L.P.
Inventor: Balasingh P. Samuel , Michael Wayne Arms , Adolfo S. Montero
Abstract: A system for secure processing of intra-processor data comprising firmware configured to operate on a processor. An operating system configured to operate on the processor. Payload configured to operate on the processor. An embedded controller coupled to the firmware, the operating system and the payload, wherein the embedded controller is configured to enable messaging between the firmware, the operating system and the payload.
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公开(公告)号:US12001302B2
公开(公告)日:2024-06-04
申请号:US17930346
申请日:2022-09-07
Applicant: Dell Products, L.P.
Inventor: Balasingh Ponraj Samuel , Michael Wayne Arms , Vivek Viswanathan Iyer
CPC classification number: G06F11/167 , G06F11/1662 , G06F11/2048
Abstract: Systems and methods for memory serviceability mitigation are described. In some embodiments, an Information Handling System (IHS) may include a processor and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause the IHS to: after failure of a memory device, notify a cloud service and enter a mitigation mode of operation with respect to the memory device, receive a message from the cloud service indicative of the provisioning of a replacement memory device, and, in response to the message and upon detection of a chassis intrusion event, leave the mitigation mode of operation with respect to the replacement memory device.
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公开(公告)号:US20240427668A1
公开(公告)日:2024-12-26
申请号:US18341433
申请日:2023-06-26
Applicant: Dell Products L.P.
Inventor: Balasingh P. Samuel , Adolfo S. Montero , Michael Wayne Arms
Abstract: Aspects of this disclosure implement a power recovery method without user intervention to drain all power rails of a non-booting information handling system and restoring power after a full drain sequence has been completed. A method may include determining, by a management circuit, a failure occurs preventing handoff from a basic input/output system (BIOS) to an operating system; based on determining the failure occurs: disconnecting, by the management circuit of the information handling system, one or more active power sources and one or more real-time clock (RTC) power sources; and after a predetermined delay following disconnecting: re-connecting, by the management circuit of the information handling system, the at least one of the one or more active power sources or the one or more real-time clock (RTC) power sources; and booting the information handling system. Other aspects are also disclosed.
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公开(公告)号:US20240078158A1
公开(公告)日:2024-03-07
申请号:US17930346
申请日:2022-09-07
Applicant: Dell Products, L.P.
Inventor: Balasingh Ponraj Samuel , Michael Wayne Arms , Vivek Viswanathan Iyer
CPC classification number: G06F11/167 , G06F11/1662 , G06F11/2048
Abstract: Systems and methods for memory serviceability mitigation are described. In some embodiments, an Information Handling System (IHS) may include a processor and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause the IHS to: after failure of a memory device, notify a cloud service and enter a mitigation mode of operation with respect to the memory device, receive a message from the cloud service indicative of the provisioning of a replacement memory device, and, in response to the message and upon detection of a chassis intrusion event, leave the mitigation mode of operation with respect to the replacement memory device.
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