公开(公告)号：US06240065B1

公开(公告)日：2001-05-29

申请号：US09129444

申请日：1998-07-30

Applicant: Eitan Medina ,  Rami Rozenzveig ,  David Shemla

Inventor： Eitan Medina ,  Rami Rozenzveig ,  David Shemla

IPC: G06F1516

CPC classification number: H04L49/103 ,  G06F15/17375 ,  H04L49/201 ,  H04L49/30 ,  H04L49/501 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9021 ,  H04L49/9047

Abstract: A method and apparatus for managing packet memory is provided. The apparatus includes an empty list, a storage buffer and apparatus for updating the storage buffer and empty list. The empty list includes a multiplicity of single bit buffers. The storage buffer includes a multiplicity of contiguous buffers, wherein each single bit buffer is associated with one of the contiguous buffers. The state of the bit of a single bit buffer indicates the empty or full state of the associated contiguous buffer and the address of a contiguous buffer is a simple function of the address or number of its associated single bit buffer. The updating apparatus stores data in and removes data from the contiguous buffers and correspondingly updates the states of the associated single bits buffers.

Abstract translation: 提供了一种用于管理分组存储器的方法和装置。 该装置包括空列表，存储缓冲器和用于更新存储缓冲器和空列表的装置。 空列表包括多个单个位缓冲区。 存储缓冲器包括多个连续缓冲器，其中每个单个位缓冲器与一个连续缓冲器相关联。 单个位缓冲器的位的状态指示相关连续缓冲器的空或完全状态，连续缓冲器的地址是其相关联的单位缓冲器的地址或编号的简单函数。 更新装置将数据存储在相邻缓冲器中并从其中移除数据，并相应地更新相关联的单个位缓冲器的状态。

公开(公告)号：US07336674B2

公开(公告)日：2008-02-26

申请号：US10701793

申请日：2003-11-05

Applicant: Eitan Medina ,  Rami Rozenzveig ,  David Shemla

Inventor： Eitan Medina ,  Rami Rozenzveig ,  David Shemla

IPC: G06F15/16 ,  H04L12/56

CPC classification number: H04L49/103 ,  G06F15/17375 ,  H04L49/201 ,  H04L49/30 ,  H04L49/501 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9021 ,  H04L49/9047

Abstract: A method and apparatus for managing packet memory is provided. The apparatus includes an empty list, a storage buffer and apparatus for updating the storage buffer and empty list. The empty list includes a multiplicity of single bit buffers. The storage buffer includes a multiplicity of contiguous buffers, wherein each single bit buffer is associated with one of the contiguous buffers. The state of the bit of a single bit buffer indicates the empty or full state of the associated contiguous buffer and the address of a contiguous buffer is a simple function of the address or number of its associated single bit buffer. The updating apparatus stores data in and removes data from the contiguous buffers and correspondingly updates the states of the associated single bits buffers.

Abstract translation: 提供了一种用于管理分组存储器的方法和装置。 该装置包括空列表，存储缓冲器和用于更新存储缓冲器和空列表的装置。 空列表包括多个单个位缓冲区。 存储缓冲器包括多个连续缓冲器，其中每个单个位缓冲器与一个连续缓冲器相关联。 单个位缓冲器的位的状态指示相关连续缓冲器的空或完全状态，连续缓冲器的地址是其相关联的单位缓冲器的地址或编号的简单函数。 更新装置将数据存储在相邻缓冲器中并从其中移除数据，并相应地更新相关联的单个位缓冲器的状态。

公开(公告)号：US07729369B1

公开(公告)日：2010-06-01

申请号：US12070060

申请日：2008-02-14

Applicant: Eitan Medina ,  Rami Rozenzveig ,  David Shemla

Inventor： Eitan Medina ,  Rami Rozenzveig ,  David Shemla

IPC: H04L12/56 ,  G06F11/00 ,  H04Q7/00

CPC classification number: H04L49/901 ,  G06F15/17375 ,  H04L49/30 ,  H04L49/90 ,  H04L49/9021 ,  H04L49/9047

Abstract: A method and apparatus for managing packet memory is provided. The apparatus includes an empty list, a storage buffer and apparatus for updating the storage buffer and empty list. The empty list includes a multiplicity of single bit buffers. The storage buffer includes a multiplicity of contiguous buffers, wherein each single bit buffer is associated with one of the contiguous buffers. The state of the bit of a single bit buffer indicates the empty or full state of the associated contiguous buffer and the address of a contiguous buffer is a simple function of the address or number of its associated single bit buffer. The updating apparatus stores data in and removes data from the contiguous buffers and correspondingly updates the states of the associated single bits buffers.

Abstract translation: 提供了一种用于管理分组存储器的方法和装置。 该装置包括空列表，存储缓冲器和用于更新存储缓冲器和空列表的装置。 空列表包括多个单个位缓冲区。 存储缓冲器包括多个连续缓冲器，其中每个单个位缓冲器与一个连续缓冲器相关联。 单个位缓冲器的位的状态指示相关连续缓冲器的空或完全状态，连续缓冲器的地址是其相关联的单位缓冲器的地址或编号的简单函数。 更新装置将数据存储在相邻缓冲器中并从其中移除数据，并相应地更新相关联的单个位缓冲器的状态。

公开(公告)号：US06678278B2

公开(公告)日：2004-01-13

申请号：US09861649

申请日：2001-05-22

Applicant: Eitan Medina ,  Rami Rozenzveig ,  David Shemla

Inventor： Eitan Medina ,  Rami Rozenzveig ,  David Shemla

IPC: G06F1516

CPC classification number: H04L49/103 ,  G06F15/17375 ,  H04L49/201 ,  H04L49/30 ,  H04L49/501 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9021 ,  H04L49/9047

Abstract: A method and apparatus for managing packet memory is provided. The apparatus includes an empty list, a storage buffer and apparatus for updating the storage buffer and empty list. The empty list includes a multiplicity of single bit buffers. The storage buffer includes a multiplicity of contiguous buffers, wherein each single bit buffer is associated with one of the contiguous buffers. The state of the bit of a single bit buffer indicates the empty or full state of the associated contiguous buffer and the address of a contiguous buffer is a simple function of the address or number of its associated single bit buffer. The updating apparatus stores data in and removes data from the contiguous buffers and correspondingly updates the states of the associated single bits buffers.

Abstract translation: 提供了一种用于管理分组存储器的方法和装置。 该装置包括空列表，存储缓冲器和用于更新存储缓冲器和空列表的装置。 空列表包括多个单个位缓冲区。 存储缓冲器包括多个连续缓冲器，其中每个单个位缓冲器与一个连续缓冲器相关联。 单个位缓冲器的位的状态指示相关连续缓冲器的空或完全状态，连续缓冲器的地址是其相关联的单位缓冲器的地址或编号的简单函数。 更新装置将数据存储在相邻缓冲器中并从其中移除数据，并相应地更新相关联的单个位缓冲器的状态。

公开(公告)号：US20090296717A1

公开(公告)日：2009-12-03

申请号：US12539168

申请日：2009-08-11

Applicant: Eitan Medina ,  David Shemla

Inventor： Eitan Medina ,  David Shemla

IPC: H04L12/56

CPC classification number: H04L29/12801 ,  H04L12/4641 ,  H04L12/467 ,  H04L29/12839 ,  H04L45/745 ,  H04L61/6004 ,  H04L61/6022

Abstract: A switch controller includes a plurality of ports, a hash table, and a hash table control unit. The plurality of ports includes at least one bus port associated with ports connected to other switch controllers. The hash table stores MAC addresses and VLAN ids of ports within a network. The hash table control unit hashes a MAC address and a VLAN id of a packet to a first hash table location.

Abstract translation: 开关控制器包括多个端口，散列表和散列表控制单元。 多个端口包括与连接到其他交换机控制器的端口相关联的至少一个总线端口。 哈希表存储网络中端口的MAC地址和VLAN ID。 散列表控制单元将分组的MAC地址和VLAN id分别散列到第一散列表位置。

公开(公告)号：US07573882B2

公开(公告)日：2009-08-11

申请号：US11243710

申请日：2005-10-05

Applicant: Eitan Medina ,  David Shemla

Inventor： Eitan Medina ,  David Shemla

IPC: H04L12/28 ,  H04L12/56 ,  H04L1/00 ,  H04L12/26 ,  G06F15/173

CPC classification number: H04L29/12801 ,  H04L12/4641 ,  H04L12/467 ,  H04L29/12839 ,  H04L45/745 ,  H04L61/6004 ,  H04L61/6022

Abstract: A generally full-wire throughput, switching Ethernet controller used within an Ethernet network of other switching Ethernet controllers connected together by a bus. The controller comprises a plurality of ports including at least one bus port associated with ports connected to other switching Ethernet controllers. A hash table stores MAC addresses and VLAN ids of ports within said Ethernet network. A hash table address control hashes the MAC address and VLAN id of a packet to initial hash table location values, changes the hash table location values by a fixed jump amount if the address and VLAN id values stored in said initial hash table location do not match the received address and VLAN id, and provides at least an output port number of the port associated with the received address and VLAN id. A storage buffer includes a multiplicity of contiguous buffers in which to temporarily store said packet.

Abstract translation: 通用全线吞吐量，交换以太网控制器，用于通过总线连接在一起的其他交换以太网控制器的以太网中。 控制器包括多个端口，其包括与连接到其他交换以太网控制器的端口相关联的至少一个总线端口。 哈希表存储所述以太网内的端口的MAC地址和VLAN ID。 散列表地址控制将数据包的MAC地址和VLAN ID分配到初始哈希表位置值，如果存储在所述初始哈希表位置中的地址和VLAN ID值不匹配，则将哈希表位置值更改固定跳转量 接收到的地址和VLAN ID，并至少提供与接收到的地址和VLAN ID相关联的端口的输出端口号。 存储缓冲器包括多个连续缓冲器，其中临时存储所述分组。

公开(公告)号：US06829245B1

公开(公告)日：2004-12-07

申请号：US09348351

申请日：1999-07-08

Applicant: Eitan Medina ,  David Shemla ,  Yosef Solt

Inventor： Eitan Medina ,  David Shemla ,  Yosef Solt

IPC: H04L1256

CPC classification number: H04L49/508 ,  H04L49/201 ,  H04L49/30 ,  H04L49/501

Abstract: A network switch which includes a plurality of output ports, at least one input port and a queuing manager. Each output port has a control unit associated therewith. The input port receives incoming data destined for various ones of the output ports. The queuing manager directs the incoming data to their destination output ports. Each control unit includes an output queue, a fullness/emptiness sensor and a head of line (HOL) mask. The output queue stores the incoming data destined for its associated output port. The sensor senses when the output queue reaches a fullness or an emptiness state. The HOL mask is connected to the output of the sensor and blocks inflow of the incoming data to the output queue when the sensor senses the fullness state and for enabling inflow when the sensor senses the emptiness state.

Abstract translation: 一种网络交换机，包括多个输出端口，至少一个输入端口和排队管理器。 每个输出端口具有与其相关联的控制单元。 输入端口接收去往各种输出端口的输入数据。 排队管理器将传入的数据引导到其目标输出端口。 每个控制单元包括输出队列，丰满度/空虚传感器和行头（HOL）掩模。 输出队列存储发往其相关输出端口的输入数据。 传感器检测输出队列何时达到饱和或空虚状态。 当传感器感测到充满状态并且当传感器感测到空虚状态时，HOL掩模连接到传感器的输出并阻止输入数据流入输出队列。

公开(公告)号：US08005104B2

公开(公告)日：2011-08-23

申请号：US12815928

申请日：2010-06-15

Applicant: Eitan Medina ,  David Shemla

Inventor： Eitan Medina ,  David Shemla

IPC: H04L12/28 ,  H04L12/56 ,  H04L12/54

CPC classification number: H04L49/101 ,  G06F13/385 ,  H04L12/46 ,  H04L49/15 ,  H04L49/25 ,  H04L49/3009 ,  H04L49/3018 ,  H04L49/3027 ,  H04L49/501 ,  H04L49/505

Abstract: A method for transferring data includes connecting N ports of a crossbar to N devices, respectively, where N is an integer greater than one. Inbound data is received at one of the N ports from a respective one of the N devices. Dedicated connections are provided between an input buffer of one of the N ports and N−1 output buffers associated with others of the N ports, respectively. At least one of the N−1 output buffers of the others of the N ports is selected to output outbound data corresponding to the inbound data. The inbound data from the input buffer of one of the N ports is selectively transferred to at least one of the N−1 output buffers of the others of the N ports.

Abstract translation: 一种用于传送数据的方法包括将N个N个端口分别连接到N个装置，其中N是大于1的整数。 在来自N个设备中的相应一个的N个端口中的一个端口处接收入站数据。 在N个端口之一的输入缓冲器和与N个端口中的其他端口相关联的N-1个输出缓冲器之间分别提供专用连接。 选择N个端口中的其他N个输出缓冲器中的至少一个输出对应于入站数据的出站数据。 来自N个端口之一的输入缓冲器的入站数据被选择性地传送到N个端口中的其他N个端口的N-1个输出缓冲器中的至少一个。

公开(公告)号：US07957388B2

公开(公告)日：2011-06-07

申请号：US12539168

申请日：2009-08-11

Applicant: Eitan Medina ,  David Shemla

Inventor： Eitan Medina ,  David Shemla

IPC: H04L12/28 ,  H04L12/56 ,  H04L1/00 ,  H04L12/26 ,  G06F15/173

CPC classification number: H04L29/12801 ,  H04L12/4641 ,  H04L12/467 ,  H04L29/12839 ,  H04L45/745 ,  H04L61/6004 ,  H04L61/6022

Abstract: A switch controller includes a plurality of ports, a hash table, and a hash table control unit. The plurality of ports includes at least one bus port associated with ports connected to other switch controllers in a network. The hash table stores MAC addresses and VLAN ids of ports within the network. The hash table control unit hashes a MAC address and a VLAN id of a packet to identify a first location in the hash table. For each one of the VLAN ids stored in the hash table, one of the MAC addresses identifies one of the other switch controllers having ports belonging to the one of the VLAN ids without identifying each one of the ports of the one of the other switch controllers that belongs to the one of the VLAN ids.

Abstract translation: 开关控制器包括多个端口，散列表和散列表控制单元。 多个端口包括与连接到网络中的其他交换机控制器的端口相关联的至少一个总线端口。 哈希表存储网络中端口的MAC地址和VLAN ID。 散列表控制单元散列分组的MAC地址和VLAN id，以标识散列表中的第一个位置。 对于存储在散列表中的每个VLAN ID，其中一个MAC地址识别具有属于该VLAN ID的其中一个端口的其他交换机控制器之一，而不识别其中一个交换机控制器中的每一个的端口 属于VLAN ID中的一个。

公开(公告)号：US07477652B2

公开(公告)日：2009-01-13

申请号：US11152901

申请日：2005-06-15

Applicant: Eitan Medina ,  David Shemla

Inventor： Eitan Medina ,  David Shemla

IPC: H04L12/28 ,  H04L12/56 ,  H04L12/54

CPC classification number: H04L49/101 ,  G06F13/385 ,  H04L12/46 ,  H04L49/15 ,  H04L49/25 ,  H04L49/3009 ,  H04L49/3018 ,  H04L49/3027 ,  H04L49/501 ,  H04L49/505

Abstract: A crossbar for communicating with at least one device, the crossbar comprises N ports. Each one of the N ports comprises a link logic unit to receive messages and data from a respective device, N-1 output buffers each corresponding to another one of the N-1 ports and a port arbiter to select one of the N-1 output buffers to output data to the respective device. The stored data is transferred to the corresponding output buffer of a selected one of the other one of the N ports.

Abstract translation: 用于与至少一个设备通信的交叉开关，横杆包括N个端口。 N个端口中的每一个包括链接逻辑单元，用于从相应设备接收消息和数据，每个对应于N-1个端口中的另一个的N-1个输出缓冲器和端口仲裁器，以选择N-1个输出中的一个 缓冲器将数据输出到相应的设备。 存储的数据被传送到N个端口中的另一个中选定的一个的相应输出缓冲器。