SYSTEM FOR CALIBRATING A TIME CONSTANT OF AN INTEGRATED CIRCUIT, AND INTEGRATED CIRCUIT PROVIDED WITH SUCH A SYSTEM
    1.
    发明申请
    SYSTEM FOR CALIBRATING A TIME CONSTANT OF AN INTEGRATED CIRCUIT, AND INTEGRATED CIRCUIT PROVIDED WITH SUCH A SYSTEM 有权
    用于校准集成电路的时间常数的系统,以及用这种系统提供的集成电路

    公开(公告)号:US20120026024A1

    公开(公告)日:2012-02-02

    申请号:US13146898

    申请日:2010-01-28

    CPC classification number: H03H11/12 H03H7/01 H03H2210/04 H03M3/38 H03M3/494

    Abstract: System and method for calibrating a time constant R0Ci of an integrated electronic current-feedback continuous-time delta sigma analog/digital converter (modulator) having a variable-impedance filter coupled to the input of the modulator, an analog input signal Vin of fixed frequency applied to the variable-impedance filter, wherein the analog input signal Vin attenuation engendered by the variable-impedance filter is measured, and the value of a time constant R0Ci in the modulator and the value of the impedance of the variable-impedance filter are modified until an attenuation corresponding to the desired attenuation for the integrated electronic circuit modulator is obtained.

    Abstract translation: 用于校准具有耦合到调制器的输入的可变阻抗滤波器的集成电子电流反馈连续时间Σ-Σ模拟/数字转换器(调制器)的时间常数R0Ci的系统和方法,固定频率的模拟输入信号Vin 应用于可变阻抗滤波器,其中测量由可变阻抗滤波器产生的模拟输入信号Vin衰减,并且调制器中的时间常数R0Ci和可变阻抗滤波器的阻抗值被修改 直到获得对应于集成电子电路调制器的期望衰减的衰减。

    Method of sampling an analogue radiofrequency signal
    2.
    发明授权
    Method of sampling an analogue radiofrequency signal 有权
    模拟射频信号采样方法

    公开(公告)号:US07634247B2

    公开(公告)日:2009-12-15

    申请号:US11664149

    申请日:2005-03-15

    CPC classification number: H04B1/28 H04B1/0025

    Abstract: A method for sampling an analogue radiofrequency signal comprising reception of the analogue radiofrequency signal, sending of the received signal on two analogue channels, each channel performing a first signal sampling operation, including a filtering step eliminating signal frequencies that could fold on the useful signal during sampling such that the sampled signal represents a filtered version of the received signal, wherein the sampling frequency is taken to be equal to the frequency of the signal carrier divided by a factor Ndiv1+½, Ndiv1 being an integer number, to bring the useful signal to half of the sampling frequency after sampling.

    Abstract translation: 一种对模拟射频信号进行采样的方法,包括接收模拟射频信号,在两个模拟信道上发送接收信号,每个信道执行第一信号采样操作,包括滤波步骤,消除可能在有用的信号上折叠的信号频率 信号,使得采样信号表示接收信号的滤波版本,其中采样频率取等于信号载波的频率除以因子Ndiv1 +½,Ndiv1为整数,以使得 有用的信号采样后采样频率的一半。

    Method and system for measuring a time constant of an integrated circuit, and integrated circuit provided with such a system
    3.
    发明授权
    Method and system for measuring a time constant of an integrated circuit, and integrated circuit provided with such a system 有权
    用于测量集成电路的时间常数的方法和系统,以及具有这种系统的集成电路

    公开(公告)号:US09030213B2

    公开(公告)日:2015-05-12

    申请号:US13148274

    申请日:2010-01-28

    Applicant: Eric Andre

    Inventor: Eric Andre

    CPC classification number: H03H11/12

    Abstract: A method and system for measuring a time constant RC of an integrated electronic circuit is provided. This integrated circuit may be made up of a first hardware component and of a second hardware component wherein one of the hardware components is a resistive element and the other is a capacitive element. The first and the second hardware components are connected to an inverting input of an operational amplifier of an integrator of a delta-sigma modulator. A DC voltage is applied to the modulator input. The output signal Qs of the modulator is measured with the aid of an analog/digital converter, and the value of the time constant RC is determined on the basis of at least one measurement of the level of the DC component of the output signal Qs of the modulator carried out with the air of a measurement counter circuit.

    Abstract translation: 提供了一种用于测量集成电子电路的时间常数RC的方法和系统。 该集成电路可以由第一硬件部件和第二硬件部件组成,其中硬件部件之一是电阻元件,另一个是电容元件。 第一和第二硬件组件连接到Δ-Σ调制器的积分器的运算放大器的反相输入端。 直流电压被施加到调制器输入端。 借助于模拟/数字转换器来测量调制器的输出信号Qs,并且基于对输出信号Qs的DC分量的电平的至少一个测量来确定时间常数RC的值 调制器用测量计数器电路的空气进行。

    Radiofrequency transmitter with a high degree of integration and possibly with self-calibrating image deletion
    4.
    再颁专利
    Radiofrequency transmitter with a high degree of integration and possibly with self-calibrating image deletion 失效
    射频发射机具有较高的集成度,可能会自动校准图像删除

    公开(公告)号:USRE42043E1

    公开(公告)日:2011-01-18

    申请号:US11318388

    申请日:2005-12-23

    Applicant: Eric Andre

    Inventor: Eric Andre

    CPC classification number: H04L27/206 H03C3/403 H03D7/166

    Abstract: A radio frequency transmitter, of the type supplied with two signals in baseband and in quadrature, I(nT) and q(nT), which are images from two binary streams representing information to be transmitted, 1) provides a first transposition into the digital domain, at an intermediate frequency ω0, for the baseband signals and generates, by combination, two signals of intermediate frequency in quadrature, 2) provides a second transposition into the analog domain, after multiplication by a frequency ω1, followed by a summation of the two signals at intermediate frequency and in quadrature, in such a way that a resultant signal is generated which is found finally around a frequency ω2, where ω2=ω0+ω1. In an advantageous variant, the radio frequency transmitter additionally digitally compensates gain and phase imperfections of the direct conversion.

    Abstract translation: 一种提供有基带和正交的两个信号(i(nT)和q(nT))的类型的射频发射机,它们是来自表示要发送的信息的两个二进制流的图像,1)提供第一个转置到数字 域,以中频ω0为基带信号,并通过组合产生正交中间频率的两个信号,2)在乘以频率ω1之后提供第二转置到模拟域中,之后是 以中频和正交的两个信号,使得产生最终在ω2=ω0+ω1周围的频率ω2附近得到的合成信号。 在有利的变型中,射频发射机另外数字地补偿直接转换的增益和相位缺陷。

    Dual mode radio frequency reception device and corresponding multimedia receiver

    公开(公告)号:US06999716B1

    公开(公告)日:2006-02-14

    申请号:US09511330

    申请日:2000-02-23

    CPC classification number: G01S19/36 H04H40/18 H04H2201/20

    Abstract: The invention relates to a dual mode radio frequency reception device of the type enabling the reception firstly of multi-carrier broadcast signals in a first frequency band and secondly radio positioning signals in a second frequency band, comprising a single preprocessing module (21), particularly including a pass-band antenna filter (211) in which the pass-band includes at least the said first and second frequency bands, and outputting firstly to a first processing system (22) to process the said multi-carrier broadcast signals, and secondly to a second processing system (23) to process the said radio positioning signals.

    System for calibrating a time constant of an integrated circuit, and integrated circuit provided with such a system
    6.
    发明授权
    System for calibrating a time constant of an integrated circuit, and integrated circuit provided with such a system 有权
    用于校准集成电路的时间常数的系统,以及具有这种系统的集成电路

    公开(公告)号:US08610610B2

    公开(公告)日:2013-12-17

    申请号:US13146898

    申请日:2010-01-28

    CPC classification number: H03H11/12 H03H7/01 H03H2210/04 H03M3/38 H03M3/494

    Abstract: System and method for calibrating a time constant R0Ci of an integrated electronic current-feedback continuous-time delta sigma analog/digital converter (modulator) having a variable-impedance filter coupled to input of the modulator, an analog input signal Vin of fixed frequency applied to the variable-impedance filter, wherein the analog input signal Vin attenuation engendered by the variable-impedance filter is measured, and the value of a time constant R0Ci in the modulator and value of the impedance of the variable-impedance filter are modified until an attenuation corresponding to the desired attenuation for the integrated electronic circuit modulator is obtained.

    Abstract translation: 用于校准具有耦合到调制器的输入的可变阻抗滤波器的集成电子电流反馈连续时间ΔΣ模拟/数字转换器(调制器)的时间常数R0Ci的系统和方法,施加固定频率的模拟输入信号Vin 到可变阻抗滤波器,其中测量由可变阻抗滤波器产生的模拟输入信号Vin衰减,并且调制器中的时间常数R0Ci的值和可变阻抗滤波器的阻抗值被修改直到 获得对应于集成电子电路调制器的期望衰减的衰减。

    METHOD AND SYTEM FOR MEASURING A TIME CONSTANT OF AN INTEGRATED CIRCUIT, AND INTEGRATED CIRCUIT PROVIDED WITH SUCH A SYSTEM
    7.
    发明申请
    METHOD AND SYTEM FOR MEASURING A TIME CONSTANT OF AN INTEGRATED CIRCUIT, AND INTEGRATED CIRCUIT PROVIDED WITH SUCH A SYSTEM 有权
    用于测量集成电路的时间常数的方法和系统以及提供给该系统的集成电路

    公开(公告)号:US20120025847A1

    公开(公告)日:2012-02-02

    申请号:US13148274

    申请日:2010-01-28

    Applicant: Eric Andre

    Inventor: Eric Andre

    CPC classification number: H03H11/12

    Abstract: A method and system for measuring a time constant RC of an integrated electronic circuit is provided. This integrated circuit may be made up of a first hardware component and of a second hardware component wherein one of the hardware components is a resistive element and the other is a capacitive element. The first and the second hardware components are connected to an inverting input of an operational amplifier of an integrator of a delta-sigma modulator. A DC voltage is applied to the modulator input. The output signal Qs of the modulator is measured with the air of an analog/digital converter, and the value of the time constant RC is determined on the basis of at least one measurement of the level of the DC component of the output signal Qs of the modulator carried out with the air of a measurement counter circuit.

    Abstract translation: 提供了一种用于测量集成电子电路的时间常数RC的方法和系统。 该集成电路可以由第一硬件部件和第二硬件部件组成,其中硬件部件之一是电阻元件,另一个是电容元件。 第一和第二硬件组件连接到Δ-Σ调制器的积分器的运算放大器的反相输入端。 直流电压被施加到调制器输入端。 调制器的输出信号Qs用模拟/数字转换器的空气进行测量,并且时间常数RC的值是基于对输出信号Qs的直流分量的电平的至少一次测量来确定的 调制器用测量计数器电路的空气进行。

    System of DAC correction for a &Dgr;&Sgr; modulator
    8.
    发明授权
    System of DAC correction for a &Dgr;&Sgr; modulator 有权
    DELTASIGMA调制器的DAC校正系统

    公开(公告)号:US06522276B2

    公开(公告)日:2003-02-18

    申请号:US09794409

    申请日:2001-06-20

    Abstract: A &Dgr;&Sgr; modulator including a corrector unit for measuring an error due to differences in the operating parameters of individual components of an internal D/A converter, the corrector unit applying a correction of the error measured in this way to a digital signal, the modulator being characterized in that the internal D/A converter includes a number of individual components greater than the number necessary for internal conversion, and in that the corrector unit is suitable for extracting from the internal conversion process, in alternation, on each occasion a different component from the various individual components in order to measure the operating parameter error of the extracted component, while leaving a number of components in action that is sufficient for internal conversion.

    Abstract translation: 一种DELTASIGMA调制器,包括用于测量由于内部D / A转换器的各个组件的操作参数的差异引起的误差的校正单元,校正单元将以这种方式测量的误差的校正应用于数字信号,调制器为 其特征在于,所述内部D / A转换器包括大于内部转换所需数量的多个独立部件,并且所述校正器单元适于从内部转换处理中逐次提取不同的部件, 各种单独的组件,以便测量提取的组件的操作参数误差,同时留下足够内部转换的多个组件。

    Delta-sigma modulator provided with a charge sharing integrator
    9.
    发明授权
    Delta-sigma modulator provided with a charge sharing integrator 有权
    配有电荷共享积分器的Δ-Σ调制器

    公开(公告)号:US07474241B2

    公开(公告)日:2009-01-06

    申请号:US11733375

    申请日:2007-04-10

    Applicant: Eric Andre

    Inventor: Eric Andre

    CPC classification number: H03M3/464 H03M3/43 H03M3/454

    Abstract: An analog-digital delta-sigma converter includes a plurality of continuous time integrators for performing a delta-sigma modulation. Each integrator includes at least one charge sharing integrator at a modulator input. One or more pure integrators follow the charge sharing integrator.

    Abstract translation: 模拟数字Δ-Σ转换器包括用于执行Δ-Σ调制的多个连续时间积分器。 每个积分器在调制器输入端包括至少一个电荷共享积分器。 一个或多个纯积分器跟随电荷共享积分器。

    Radiofrequency transmitter with a high degree of integration and possibly with self-calibrating image deletion
    10.
    发明授权
    Radiofrequency transmitter with a high degree of integration and possibly with self-calibrating image deletion 有权
    射频发射机具有较高的集成度,可能会自动校准图像删除

    公开(公告)号:US06668024B1

    公开(公告)日:2003-12-23

    申请号:US09518944

    申请日:2000-03-06

    Applicant: Eric Andre

    Inventor: Eric Andre

    CPC classification number: H04L27/206 H03C3/403 H03D7/166

    Abstract: A radio frequency transmitter, of the type supplied with two signals in baseband and in quadrature, I(nT) and q(nT), which are images from two binary streams representing information to be transmitted, 1) provides a first transposition into the digital domain, at an intermediate frequency &ohgr;0, for the baseband signals and generates, by combination, two signals of intermediate frequency in quadrature, 2) provides a second transposition into the analog domain, after multiplication by a frequency &ohgr;1, followed by a summation of the two signals at intermediate frequency and in quadrature, in such a way that a resultant signal is generated which is found finally around a frequency &ohgr;2, where &ohgr;2=&ohgr;0+&ohgr;1. In an advantageous variant, the radio frequency transmitter additionally digitally compensates gain and phase imperfections of the direct conversion.

    Abstract translation: 一种提供有基带和正交的两个信号(i(nT)和q(nT))的类型的射频发射机,它们是来自表示要发送的信息的两个二进制流的图像,1)提供第一个转置到数字 对于基带信号,以中间频率ω0来表示,并且通过组合产生正交中间频率的两个信号,2)在乘以频率ω1之后,向模拟域提供第二转置,随后是 以中频和正交的两个信号,以这样一种方式产生最终在ωω2附近被发现的频率ω2,其中ω=ω+ω+ 1。 在有利的变型中,射频发射机另外数字地补偿直接转换的增益和相位缺陷。

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