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公开(公告)号：US10459467B1
公开(公告)日：2019-10-29
申请号：US16353074
申请日：2019-03-14
Applicant: FCI Inc.
Inventor： Je Cheol Moon
Abstract: Disclosed herein is a switching regulator with a soft start circuit for suppressing an in-rush current. The switching regulator includes a peak detector configured to receive a clock signal and detect a peak voltage of the clock signal, a comparator configured to generate a soft start signal for controlling a soft start of the switching regulator based on a result of comparing a level of the peak voltage of the clock signal to a preset reference voltage level, a counter configured to switch a state of the soft start signal at a time point when a preset soft start time arrives, and a ramp voltage generation unit configured to generate a ramp voltage by adjusting a resistance of a variable resistor based on the soft start signal.
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2.发明授权Apparatus for lock detection suitable for fractional-N frequency synthesizer and method thereof 有权用于分数N频率合成器的锁定检测装置及其方法公开(公告)号：US09407275B1
公开(公告)日：2016-08-02
申请号：US14714400
申请日：2015-05-18
Applicant: FCI Inc.
Inventor： Je Cheol Moon , Myung Woon Hwang
CPC classification number: H03L7/095 , H03L7/1976
Abstract: Disclosed are an apparatus for lock detection suitable for a fractional-N frequency synthesizer and a method thereof. The lock detector for use in the fractional-N frequency synthesizer includes a delay unit delaying an N-divider output frequency clock based on an output value of a fraction ratio modulator, a lock detection unit outputting a lock detection signal by comparing a reference frequency clock with the N-divider output frequency clock delayed by the delay unit, a counter counting the number of lock detection signals received from the lock detection unit, and a controller issuing a command to output a lock identification signal based on the number of lock detection signals counted by the counter.
Abstract translation: 公开了适用于分数N频率合成器的锁定检测装置及其方法。 用于分数N频率合成器的锁定检测器包括：延迟单元，其基于分数比调制器的输出值延迟N分频器输出频率时钟;锁定检测单元，通过将参考频率时钟 其中N分频器输出频率时钟被延迟单元延迟，计数从锁定检测单元接收的锁定检测信号的数量，以及控制器，基于锁定检测信号的数量发出用于输出锁定识别信号的命令 由柜台计数。
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3.发明申请Apparatus For Lock Detection Suitable For Fractional-N Frequency Synthesizer and Method Thereof 有权适用于分数N频率合成器及其方法的锁定检测装置公开(公告)号：US20160211854A1
公开(公告)日：2016-07-21
申请号：US14714400
申请日：2015-05-18
Applicant: FCI Inc.
Inventor： Je Cheol Moon , Myung Woon Hwang
CPC classification number: H03L7/095 , H03L7/1976
Abstract: Disclosed are an apparatus for lock detection suitable for a fractional-N frequency synthesizer and a method thereof. The lock detector for use in the fractional-N frequency synthesizer includes a delay unit delaying an N-divider output frequency clock based on an output value of a fraction ratio modulator, a lock detection unit outputting a lock detection signal by comparing a reference frequency clock with the N-divider output frequency clock delayed by the delay unit, a counter counting the number of lock detection signals received from the lock detection unit, and a controller issuing a command to output a lock identification signal based on the number of lock detection signals counted by the counter.
Abstract translation: 公开了适用于分数N频率合成器的锁定检测装置及其方法。 用于分数N频率合成器的锁定检测器包括：延迟单元，其基于分数比调制器的输出值延迟N分频器输出频率时钟;锁定检测单元，通过将参考频率时钟 其中N分频器输出频率时钟被延迟单元延迟，计数从锁定检测单元接收的锁定检测信号的数量，以及控制器，基于锁定检测信号的数量发出用于输出锁定识别信号的命令 由柜台计数。
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