公开(公告)号：US20200174877A1

公开(公告)日：2020-06-04

申请号：US16206017

申请日：2018-11-30

Applicant: Foxconn Interconnect Technology Limited

Inventor： Yong Mian Deng ,  Matthew M. Bruensteiner

IPC: G06F11/07

Abstract: An optical communications module performs automatic recovery from a system hard fault that occurs when a controller of the module detects a particular error. The controller outputs a heart beep signal having a preselected attribute from a first port thereof if an error check operation performed by the controller determines that an error has not occurred. A second port of the controller receives a chip reset signal from automatic control logic that is external to the controller. The automatic recovery logic monitors a first port thereof to determine whether the heart beep signal having the preselected attribute is present at or absent from the first port of the automatic recovery logic and outputs a chip reset signal from a second port of the automatic recovery logic to the second port of the controller. The chip reset signal output from the second port of the automatic recovery logic is in the first or second condition depending on whether the heart beep signal is present at or absent from, respectively, the first port of the automatic recovery logic.

公开(公告)号：US10936399B2

公开(公告)日：2021-03-02

申请号：US16206017

申请日：2018-11-30

Applicant: Foxconn Interconnect Technology Limited

Inventor： Yong Mian Deng ,  Matthew M. Bruensteiner

IPC: G06F11/07

Abstract: An optical communications module performs automatic recovery from a system hard fault that occurs when a controller of the module detects a particular error. The controller outputs a heart beep signal having a preselected attribute from a first port thereof if an error check operation performed by the controller determines that an error has not occurred. A second port of the controller receives a chip reset signal from automatic control logic that is external to the controller. The automatic recovery logic monitors a first port thereof to determine whether the heart beep signal having the preselected attribute is present at or absent from the first port of the automatic recovery logic and outputs a chip reset signal from a second port of the automatic recovery logic to the second port of the controller. The chip reset signal output from the second port of the automatic recovery logic is in the first or second condition depending on whether the heart beep signal is present at or absent from, respectively, the first port of the automatic recovery logic.