公开(公告)号：US07870407B2

公开(公告)日：2011-01-11

申请号：US11750365

申请日：2007-05-18

Applicant: Alex Branover ,  Frank P. Helms ,  Jonathan M. Owen ,  Kurt Lewchuk ,  Maurice Steinman ,  Paul Mackey

Inventor： Alex Branover ,  Frank P. Helms ,  Jonathan M. Owen ,  Kurt Lewchuk ,  Maurice Steinman ,  Paul Mackey

IPC: G06F1/32

CPC classification number: G06F1/3203

Abstract: A processor can operate in different power modes. In an active power mode, the processor executes software. In response to receiving a halt indication from the software, hardware at the processor evaluates bus transactions for the processor. If the bus transactions meet a heuristic, hardware places a processor core in a lower power mode, such as a retention mode. Because the bus transactions are evaluated by hardware, rather than by software, and the software is not required to perform handshakes and other protocols to place the processor in the lower power mode, the processor is able to place the processor core into the lower power mode more quickly, thereby conserving power.

Abstract translation: 处理器可以在不同的功率模式下工作。 在有功功率模式下，处理器执行软件。 响应于从软件接收到停止指示，处理器处的硬件评估处理器的总线事务。 如果总线事务满足启发式，则硬件将处理器内核置于较低​​功耗模式下，例如保留模式。 由于总线事务由硬件而不是软件进行评估，并且软件不需要执行握手和其他协议来将处理器置于低功耗模式，处理器能够将处理器内核置于低功耗模式 更快，从而节约电力。

公开(公告)号：US20100058078A1

公开(公告)日：2010-03-04

申请号：US12254650

申请日：2008-10-20

Applicant: Alexander Branover ,  Frank P. Helms ,  John P. Petry ,  Maurice B. Steinman

Inventor： Alexander Branover ,  Frank P. Helms ,  John P. Petry ,  Maurice B. Steinman

IPC: G06F1/00

CPC classification number: G06F1/3203 ,  G06F1/3246 ,  G06F1/329 ,  Y02D10/24

Abstract: A system may comprise a plurality of processing units, and a control unit and monitoring unit interfacing with the processing units. The control unit may receive requests for transitioning the processing units to respective target power-states, and specify respective target HW power-states corresponding to the respective target power-states. The monitoring unit may monitor operating characteristics of the system, and determine based on operating characteristics whether to allow the processing units to transition to the respective target hardware (HW) power-states. The control unit may be configured to change the respective target HW power-state to a respective updated HW power-state for each processing units for which it is determined that transition to its respective target HW power-state should not be allowed. The control unit may also be configured to infer a common target HW power-state based on the respective target HW power-states of processing units of a subset of the plurality of processing units, when the processing units of the subset of the plurality of processing units share at least one resource domain.

Abstract translation: 系统可以包括多个处理单元，以及与处理单元接口的控制单元和监控单元。 控制单元可以接收将处理单元转换到各个目标功率状态的请求，并且指定与各个目标功率状态相对应的各个目标HW功率状态。 监视单元可以监视系统的操作特性，并且基于操作特性确定是否允许处理单元转换到相应的目标硬件（HW）功率状态。 控制单元可以被配置为针对确定不应该允许转换到其各自的目标HW功率状态的每个处理单元，将相应的目标HW功率状态改变到相应的更新的HW功率状态。 控制单元还可以被配置为当多个处理的子集的处理单元时，基于多个处理单元的子集的处理单元的各个目标HW功率状态来推断公共目标HW功率状态 单位共享至少一个资源域。

公开(公告)号：US5666426A

公开(公告)日：1997-09-09

申请号：US733656

申请日：1996-10-17

Applicant: Frank P. Helms

Inventor： Frank P. Helms

IPC: H03G3/32 ,  H03G3/20

CPC classification number: H03G3/32

Abstract: A system and method for automatically adjusting the volume of an audio system to compensate for variations in ambient noise. The system includes a microphone for monitoring the ambient audio environment which includes output of the audio system plus environmental noise. The system also includes processing circuitry connected to the microphone. The processing circuitry varies the volume of the output of the audio system in proportion to changes in the environmental noise. The processing circuitry comprises the microphone, located to detect the ambient sound in the listening environment, an analog-to-digital converter connected to the output of the microphone, and a digital signal processor connected to the output of the analog-to-digital converter. The output signal of the DSP is an input to the volume control of the audio system.

Abstract translation: 一种用于自动调整音频系统音量以补偿环境噪声变化的系统和方法。 该系统包括用于监视环境音频环境的麦克风，其包括音频系统的输出以及环境噪声。 该系统还包括连接到麦克风的处理电路。 处理电路根据环境噪声的变化来改变音频系统的输出音量。 所述处理电路包括所述麦克风，所述麦克风位于用于检测所述聆听环境中的环境声音，连接到所述麦克风的输出的模拟数字转换器以及连接到所述模数转换器的输出的数字信号处理器 。 DSP的输出信号是音频系统音量控制的输入。

公开(公告)号：US08112647B2

公开(公告)日：2012-02-07

申请号：US12254650

申请日：2008-10-20

Applicant: Alexander Branover ,  Frank P. Helms ,  John P. Petry ,  Maurice B. Steinman

Inventor： Alexander Branover ,  Frank P. Helms ,  John P. Petry ,  Maurice B. Steinman

IPC: G06F1/26

CPC classification number: G06F1/3203 ,  G06F1/3246 ,  G06F1/329 ,  Y02D10/24

Abstract: A system may comprise a plurality of processing units, and a control unit and monitoring unit interfacing with the processing units. The control unit may receive requests for transitioning the processing units to respective target power-states, and specify respective target HW power-states corresponding to the respective target power-states. The monitoring unit may monitor operating characteristics of the system, and determine based on operating characteristics whether to allow the processing units to transition to the respective target hardware (HW) power-states. The control unit may be configured to change the respective target HW power-state to a respective updated HW power-state for each processing units for which it is determined that transition to its respective target HW power-state should not be allowed. The control unit may also be configured to infer a common target HW power-state based on the respective target HW power-states of processing units of a subset of the plurality of processing units, when the processing units of the subset of the plurality of processing units share at least one resource domain.

Abstract translation: 系统可以包括多个处理单元，以及与处理单元接口的控制单元和监控单元。 控制单元可以接收将处理单元转换到各个目标功率状态的请求，并且指定与各个目标功率状态相对应的各个目标HW功率状态。 监视单元可以监视系统的操作特性，并且基于操作特性确定是否允许处理单元转换到相应的目标硬件（HW）功率状态。 控制单元可以被配置为针对确定不应该允许转换到其各自的目标HW功率状态的每个处理单元，将相应的目标HW功率状态改变到相应的更新的HW功率状态。 控制单元还可以被配置为当多个处理的子集的处理单元时，基于多个处理单元的子集的处理单元的各个目标HW功率状态来推断公共目标HW功率状态 单位共享至少一个资源域。

公开(公告)号：US07146510B1

公开(公告)日：2006-12-05

申请号：US10198637

申请日：2002-07-18

Applicant: Frank P. Helms ,  Derrick R. Meyer ,  Larry D. Hewitt ,  Dale E. Gulick ,  William A. Hughes ,  Scott E. Swanstrom

Inventor： Frank P. Helms ,  Derrick R. Meyer ,  Larry D. Hewitt ,  Dale E. Gulick ,  William A. Hughes ,  Scott E. Swanstrom

IPC: G06F1/26 ,  G06F1/32

CPC classification number: G06F1/3209 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3253 ,  G06F1/3296 ,  G06F9/30083 ,  Y02D10/126 ,  Y02D10/151 ,  Y02D10/172

Abstract: An integrated circuit is coupled to a communication link and to a separate signal line and includes programmable registers specifying communication link width and frequency. The integrated circuit responds to a change in the value of the signal line by changing the width and/or frequency of at least a portion of the communication link to the programmed value in response to a change in a logical value of the signal line, without the integrated circuit entering a reset state. The width and/or frequency may be changed during a POST routine or during system operation as part of a power management or other system function while maintaining its operational state.

Abstract translation: 集成电路耦合到通信链路和单独的信号线，并且包括指定通信链路宽度和频率的可编程寄存器。 通过将通信链路的至少一部分的宽度和/或频率响应于信号线的逻辑值的改变而改变为编程值，集成电路响应于信号线的值的变化，而没有 集成电路进入复位状态。 宽度和/或频率可以在POST程序期间或在系统操作期间作为功率管理或其他系统功能的一部分而改变，同时保持其操作状态。

公开(公告)号：US07039755B1

公开(公告)日：2006-05-02

申请号：US09584301

申请日：2000-05-31

Applicant: Frank P. Helms

Inventor： Frank P. Helms

IPC: G11C11/406 ,  G06F12/16

CPC classification number: G11C11/406 ,  G11C2211/4067

Abstract: Power management logic maintains memory in a computer system in the self refresh state during a power savings state in which power is removed from the memory controller. A memory control circuit, separate from the power management logic, controls the memory during other operational modes. The power management logic maintains the system memory in the self refresh state by driving memory control signal(s) at appropriate values during the power savings state.

Abstract translation: 在从存储器控制器移除电力的功率节省状态期间，电源管理逻辑维持处于自刷新状态的计算机系统中的存储器。 与电源管理逻辑分开的存储器控​​制电路在其他操作模式下控制存储器。 功率管理逻辑通过在功率节省状态期间以适当的值驱动存储器控制信号来将系统存储器维持在自刷新状态。

公开(公告)号：US06889332B2

公开(公告)日：2005-05-03

申请号：US10015031

申请日：2001-12-11

Applicant: Frank P. Helms ,  Jeffrey A. Brinkley

Inventor： Frank P. Helms ,  Jeffrey A. Brinkley

IPC: G06F1/20 ,  G06F1/26

CPC classification number: G06F1/206 ,  Y02D10/16

Abstract: The maximum performance state available to a processor in a computer system, in terms of operating frequency and/or voltage, changes according to thermal criteria. When the temperature increases above a predetermined threshold, the maximum performance state available is reduced. Multiple temperature thresholds may be utilized providing for a gradually reduced maximum performance state as temperature increases. When the temperature returns to a lower level, the maximum performance state available is increased. Changing the maximum available performance state according to temperature provides for more gradual reduction in performance as temperature increases, which results in higher average system performance as temperature increases. Thus, a more gradual reduction in performance is provided while still maintaining a high speed rating of the processor in more ideal conditions. In normal operating conditions, high processor performance is provided, while slightly reduced performance is provided in abnormal operating conditions.

Abstract translation: 根据工作频率和/或电压，计算机系统中的处理器可用的最大性能状态根据热准则而变化。 当温度升高到高于预定阈值时，可以降低可用的最大性能状态。 可以利用多个温度阈值，提供随着温度升高逐渐降低的最大性能状态。 当温度回到较低的水平时，可以获得最大的性能状态。 根据温度改变最大可用性能状态可以随着温度的升高逐渐降低性能，这样随着温度的升高，平均系统性能就会提高。 因此，在更理想的条件下，仍然保持处理器的高速度等级，提供了性能的逐渐降低。 在正常工作条件下，提供了高处理器性能，而在异常工作条件下提供了轻微降低的性能。

公开(公告)号：US07941683B2

公开(公告)日：2011-05-10

申请号：US11743388

申请日：2007-05-02

Applicant: Alex Branover ,  Frank P. Helms ,  Maurice Steinman

Inventor： Alex Branover ,  Frank P. Helms ,  Maurice Steinman

IPC: G06F1/00

CPC classification number: G06F1/324 ,  G06F1/3225 ,  G06F1/3243 ,  G06F1/3275 ,  G06F1/3287 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/152 ,  Y02D10/171 ,  Y02D10/172

Abstract: A processor can operate in three different modes. In an active mode, a first voltage is provided to the processor, where the first voltage is sufficient to allow the processor to execute instructions. In a low-power mode, a retention voltage is provided to the processor. The processor consumes less power in the retention mode than in the active mode. In addition, the processor can operate in a third mode, where a voltage is provided to the processor sufficient to allow the processor to process cache messages, such as coherency messages, but not execute other normal operations or perform normal operations at a very low speed relative to their performance in the active mode.

Abstract translation: 处理器可以在三种不同的模式下工作。 在活动模式中，向处理器提供第一电压，其中第一电压足以允许处理器执行指令。 在低功率模式下，向处理器提供保持电压。 处理器在保留模式下的功耗比活动模式低。 此外，处理器可以在第三模式下操作，其中向处理器提供足够的电压以允许处理器处理诸如一致性消息之类的缓存消息，但不执行其他正常操作或以非常低的速度执行正常操作 相对于他们在活动模式下的表现。

公开(公告)号：US07231474B1

公开(公告)日：2007-06-12

申请号：US11140803

申请日：2005-05-31

Applicant: Frank P. Helms ,  Larry D. Hewitt ,  Scott E. Swanstrom ,  Ross Voigt LaFetra

Inventor： Frank P. Helms ,  Larry D. Hewitt ,  Scott E. Swanstrom ,  Ross Voigt LaFetra

IPC: G06F1/30 ,  G06F1/20 ,  G06F13/00

CPC classification number: G06F1/206

Abstract: A serial communication system includes an integrated circuit having a master serial interface; and a processor having a slave serial interface coupled to the master serial interface through a clock signal line and a data signal line. The slave serial interface is responsive to a read temperature command issued by the master serial interface to return a first temperature value associated with the processor.

Abstract translation: 串行通信系统包括具有主串行接口的集成电路; 以及具有通过时钟信号线和数据信号线耦合到主串行接口的从串行接口的处理器。 从串行接口响应于由主串行接口发出的读温度命令返回与处理器相关联的第一温度值。

公开(公告)号：US5760760A

公开(公告)日：1998-06-02

申请号：US503346

申请日：1995-07-17

Applicant: Frank P. Helms

Inventor： Frank P. Helms

IPC: G09G3/36

CPC classification number: G09G3/36 ,  G09G2320/0606 ,  G09G2320/0626 ,  G09G2360/144

Abstract: Method and apparatus for automatically adjusting the brightness level of an LCD based on the ambient lighting conditions of the environment in which the LCD is being operated are disclosed. In a preferred embodiment, a photodetector located proximate the front of the LCD generates to brightness control circuitry signals indicative of ambient lighting conditions. These signals are correlated to predetermined automatic brightness control values for use in controlling the brightness level of the LCD. Once the ambient light signals have been used automatically to set the brightness level of the LCD, user-selection of a different brightness level, either higher or lower, will override the automatic brightness control setting. In an alternative embodiment, a first photodetector is located proximate the front of the LCD and a second photodetector is located proximate the back of the LCD. In this embodiment, the brighter ambient condition is used to control the brightness level of the LCD. In another alternative embodiment, the brightness control circuitry comprises some form of artificial intelligence for "learning" a user's preferred brightness level, or range of brightness levels, in various ambient lighting conditions.

Abstract translation: 公开了根据LCD正在操作的环境的环境照明条件来自动调节LCD的亮度水平的方法和装置。 在优选实施例中，靠近LCD前部的光电检测器产生指示环境照明条件的亮度控制电路信号。 这些信号与用于控制LCD的亮度水平的预定的自动亮度控制值相关。 一旦自动使用环境光信号来设置LCD的亮度级别，用户选择不同亮度级别的高或低将会覆盖自动亮度控制设置。 在替代实施例中，第一光电检测器位于LCD的前部附近，并且第二光电检测器位于LCD背面附近。 在本实施例中，使用较亮的环境条件来控制LCD的亮度水平。 在另一替代实施例中，亮度控制电路包括某种形式的人造智能，用于在各种环境照明条件下“学习”用户的优选亮度级别或亮度级别范围。