公开(公告)号：US20150303115A1

公开(公告)日：2015-10-22

申请号：US14257899

申请日：2014-04-21

Applicant: GLOBALFOUNDRIES INC.

Inventor： Yiqun LIU ,  Jeasung PARK ,  Chandra REDDY

IPC: H01L21/8234 ,  H01L21/02 ,  H01L21/28 ,  H01L27/088

CPC classification number: H01L21/82345 ,  H01L21/28088 ,  H01L27/088 ,  H01L29/4966 ,  H01L29/517

Abstract: Methodologies and resulting devices are provided for modified FET threshold voltages. Embodiments include: providing an active region of a transistor on a semiconductor substrate; depositing a workfunction metal on the active region; and modifying a threshold voltage of the transistor by treating the workfunction metal with oxygen. Other embodiments include: providing first and second active regions in a semiconductor substrate for first and second transistors, respectively; forming a first workfunction metal on the first active region; forming a second workfunction metal on the second active region; and modifying a first threshold voltage level of the first transistor, a second threshold voltage level of the second transistor, or a combination thereof by treating the first workfunction metal, second workfunction metal, or a combination thereof with oxygen, wherein the second threshold voltage level is greater than the first threshold voltage level.

Abstract translation: 为修改的FET阈值电压提供了方法和结果的器件。 实施例包括：在半导体衬底上提供晶体管的有源区; 在活性区域上沉积功函数金属; 以及通过用氧处理所述功函数金属来修改所述晶体管的阈值电压。 其他实施例包括：分别在用于第一和第二晶体管的半导体衬底中提供第一和第二有源区; 在所述第一活性区上形成第一功函数金属; 在所述第二活性区上形成第二功函数金属; 以及通过处理所述第一功函数金属，所述第二功函数金属或其与氧的组合来修改所述第一晶体管的第一阈值电压电平，所述第二晶体管的第二阈值电压电平或其组合，其中所述第二阈值电压电平 大于第一阈值电压电平。

公开(公告)号：US20150017774A1

公开(公告)日：2015-01-15

申请号：US13938786

申请日：2013-07-10

Applicant: GLOBALFOUNDRIES INC.

Inventor： Wei Hua TONG ,  Hong YU ,  Jin Ping LIU ,  Hyucksoo YANG ,  Lun ZHAO ,  Chandra REDDY

IPC: H01L29/66 ,  H01L21/02

CPC classification number: H01L29/7848 ,  H01L21/02057 ,  H01L21/02236 ,  H01L21/823431 ,  H01L29/7854

Abstract: Thermal oxidation treatment methods and processes used during fabrication of semiconductor devices are provided. One method includes, for instance: obtaining a device with at least one cavity etched into the device; performing a thermal oxidation treatment to the at least one cavity; and cleaning the at least one cavity. One process includes, for instance: providing a semiconductor device with a substrate, at least one layer over the substrate and at least one fin; forming at least one gate over the fin; doping at least one region below the fin; applying a spacer layer over the device; etching the spacer layer to expose at least a portion of the gate material; etching a cavity into the at least one fin; etching a shaped opening into the cavity; performing thermal oxidation processing on the at least one cavity; and growing at least one epitaxial layer on an interior surface of the cavity.

Abstract translation: 提供了在制造半导体器件期间使用的热氧化处理方法和工艺。 一种方法包括例如：获得具有蚀刻到该装置中的至少一个腔的装置; 对所述至少一个腔进行热氧化处理; 以及清洁所述至少一个腔。 一个过程包括例如：提供具有衬底的半导体器件，衬底上的至少一个层和至少一个鳍; 在翅片上形成至少一个闸门; 掺杂鳍片以下的至少一个区域; 在该装置上施加间隔层; 蚀刻间隔层以露出栅极材料的至少一部分; 将空腔蚀刻到所述至少一个翅片中; 将成形的开口蚀刻到空腔中; 在所述至少一个腔体上进行热氧化处理; 以及在腔的内表面上生长至少一个外延层。