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    GATE HEIGHT UNIFORMITY IN SEMICONDUCTOR DEVICES
    1.
    发明申请
    GATE HEIGHT UNIFORMITY IN SEMICONDUCTOR DEVICES 有权
    栅极高度在半导体器件中的均匀性

    公开(公告)号：US20150270364A1

    公开(公告)日：2015-09-24

    申请号：US14730887

    申请日：2015-06-04

    Applicant: GLOBALFOUNDRIES Inc.

    Inventor： Tsung-Liang CHEN ,  Hung-Wei LIU ,  Rohit PAL ,  Hsin-Neng TAI ,  Huey-Ming WANG ,  Tae Hoon LEE ,  Songkram SRIVATHANAKUL ,  Danni CHEN

    IPC: H01L29/423 ,  H01L27/092

    CPC classification number: H01L29/42364 ,  H01L21/823828 ,  H01L21/823857 ,  H01L21/823864 ,  H01L27/092

    Abstract: Methods of facilitating gate height uniformity by controlling recessing of dielectric material and semiconductor devices formed from the methods are provided. The methods include, for instance, forming a transistor of the semiconductor device with an n-type transistor and a p-type transistor, the n-type transistor and the p-type transistor including plurality of sacrificial gate structures and protective masks at upper surfaces of the plurality of sacrificial gate structures; providing a dielectric material over and between the plurality of sacrificial gate structures; partially densifying the dielectric material to form a partially densified dielectric material; further densifying the partially densified dielectric material to create a modified dielectric material; and creating substantially planar surface on the modified dielectric material, to control dielectric material recess and gate height.

    Abstract translation: 提供了通过控制由这些方法形成的介电材料和半导体器件的凹陷来促进栅极高度均匀性的方法。 所述方法包括例如用n型晶体管和p型晶体管形成半导体器件的晶体管，n型晶体管和p型晶体管包括多个牺牲栅极结构和在上表面处的保护掩模 的多个牺牲栅极结构; 在多个牺牲栅极结构之上和之间提供电介质材料; 部分致密化介电材料以形成部分致密化的电介质材料; 进一步致密化部分致密化的介电材料以产生改性的介电材料; 以及在改性介电材料上形成基本平坦的表面，以控制电介质材料凹陷和栅极高度。

    METHODS OF PROTECTING A DIELECTRIC MASK LAYER AND RELATED SEMICONDUCTOR DEVICES
    3.
    发明申请
    METHODS OF PROTECTING A DIELECTRIC MASK LAYER AND RELATED SEMICONDUCTOR DEVICES 有权
    保护电介质层和相关半导体器件的方法

    公开(公告)号：US20150171001A1

    公开(公告)日：2015-06-18

    申请号：US14106340

    申请日：2013-12-13

    Applicant: GLOBALFOUNDRIES Inc.

    Inventor： Zhiguo SUN ,  Daniel SMITH ,  Kumarapuram GOPALAKRISHNAN ,  Hung-Wei LIU

    IPC: H01L23/498 ,  H01L21/3205 ,  H01L21/02 ,  H01L21/768 ,  H01L21/033

    CPC classification number: H01L21/32051 ,  H01L21/3081 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/76802 ,  H01L21/76829 ,  H01L21/7684 ,  H01L21/76846 ,  H01L21/76898 ,  H01L23/291 ,  H01L23/3192 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Devices and methods for forming semiconductor devices with a protection layer for a dielectric mask layer are provided. One method includes, for instance; obtaining a substrate having at least one of a dielectric layer and a metal layer; forming a first SiCN dielectric mask layer on a top surface of at least one of the dielectric layer and a metal layer; and forming a silicon nitride (SiNx) cap layer on a top surface of the first SiCN dielectric mask layer. One intermediate semiconductor device includes, for instance: a substrate having at least one of a dielectric layer and a metal layer; a first SiCN dielectric mask layer on a top surface of at least one of the dielectric layer and a metal layer; and a silicon nitride (SiNx) cap layer on a top surface of the first SiCN dielectric mask layer.

    Abstract translation: 提供了用于形成具有用于介电掩模层的保护层的半导体器件的器件和方法。 一种方法包括： 获得具有电介质层和金属层中的至少一个的衬底; 在所述电介质层和金属层中的至少一个的顶表面上形成第一SiCN电介质掩模层; 以及在所述第一SiCN介电掩模层的顶表面上形成氮化硅（SiNx）覆盖层。 一个中间半导体器件包括例如：具有电介质层和金属层中的至少一个的衬底; 在所述电介质层和金属层中的至少一个的顶表面上的第一SiCN介电掩模层; 和在第一SiCN介电掩模层的顶表面上的氮化硅（SiNx）覆盖层。

    METHODS OF FABRICATING DEFECT-FREE SEMICONDUCTOR STRUCTURES
    4.
    发明申请
    METHODS OF FABRICATING DEFECT-FREE SEMICONDUCTOR STRUCTURES 有权
    制作无缺陷半导体结构的方法

    公开(公告)号：US20150123250A1

    公开(公告)日：2015-05-07

    申请号：US14070823

    申请日：2013-11-04

    Applicant: GLOBALFOUNDRIES Inc.

    Inventor： Hung-Wei LIU ,  Zhiguo SUN ,  Huang LIU ,  Jin Ping LIU

    IPC: H01L21/311 ,  H01L23/58

    CPC classification number: H01L23/564 ,  H01L21/02126 ,  H01L21/02129 ,  H01L21/02274 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/3115 ,  H01L21/31155 ,  H01L21/76826 ,  H01L21/76837 ,  H01L21/823418 ,  H01L23/58 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Methods of facilitating fabrication of defect-free semiconductor structures are provided which include, for instance: providing a dielectric layer, the dielectric layer comprising at least one consumable material; selectively removing a portion of the dielectric layer, wherein the selectively removing consumes, in part, a remaining portion of the at least one consumable material, leaving, within the remaining portion of the dielectric layer, a depleted region; and subjecting the depleted region of the dielectric layer to a treatment process, to restore the depleted region with at least one replacement consumable material, thereby facilitating fabrication of a defect-free semiconductor structure.

    Abstract translation: 提供了有助于制造无缺陷半导体结构的方法，其包括例如：提供介电层，该电介质层包括至少一种可消耗材料; 选择性地去除所述电介质层的一部分，其中所述选择性去除部分地消耗所述至少一种可消耗材料的剩余部分，在所述电介质层的剩余部分内留下耗尽区; 并且对所述介质层的所述耗尽区进行处理处理，以用至少一种替代的可消耗材料恢复所述耗尽区，从而有助于制造无缺陷的半导体结构。

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