公开(公告)号：US09865514B2

公开(公告)日：2018-01-09

申请号：US14643436

申请日：2015-03-10

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Hanyi Ding ,  J. Edwin Hostetter ,  Ping-Chuan Wang ,  Kimball M. Watson

IPC: H01L21/66 ,  H01L21/304

CPC classification number: H01L22/26 ,  H01L21/304 ,  H01L22/14 ,  H01L22/34

Abstract: A through-silicon via (TSV) capacitive test structure and method of determining TSV depth based on capacitance is disclosed. The TSV capacitive test structure is formed from a plurality of TSV bars that are evenly spaced. A first group of bars are electrically connected to form a first capacitor node, and a second group of bars is electrically connected to form a second capacitor node. The capacitance is measured, and a TSV depth is computed, prior to backside thinning. The computed TSV depth may then be fed to downstream grinding and/or polishing tools to control the backside thinning process such that the semiconductor wafer is thinned such that the backside is flush with the TSV.